ASIC Engineer, Design

Meta is seeking an ASIC Engineer to join their Infrastructure organization, focusing on building cutting-edge ASICs for machine learning and network acceleration. This role is crucial in developing hardware accelerators that power Meta's extensive network of services including Facebook, Instagram, and WhatsApp. The position offers an exciting opportunity to work with industry experts in video transcode, AI/ML, and other advanced technologies.

The role involves developing functional and performance models, architecting state-of-the-art hardware accelerator ASICs, and working alongside expert engineers to build efficient "Green" data center accelerators. Key responsibilities include micro-architecture development, RTL coding, and collaboration with design verification teams to ensure robust functional and performance testing.

The ideal candidate should have a strong foundation in Computer Architecture and Logic Design, with experience in RTL development using Verilog or System Verilog. This position offers competitive compensation ranging from $114,000 to $133,000 annually, plus bonus and equity opportunities. The role is based in either Sunnyvale, CA or Austin, TX, providing an opportunity to work at the forefront of hardware development for one of the world's leading technology companies.

Meta's commitment to building the next evolution in social technology, including augmented and virtual reality experiences, makes this an exciting opportunity for someone looking to shape the future of digital connection. The company offers a comprehensive benefits package and maintains a strong commitment to equal employment opportunity and workplace accommodations.