ASIC Engineer, Formal Verification

Meta is seeking an ASIC Formal Verification Engineer to join their Infrastructure organization. This role focuses on building IP and System On Chip (SoC) for data center applications. As part of an elite team, you'll work on developing innovative ASIC solutions for Facebook's data center applications. Your responsibilities will include developing comprehensive formal testplans and ensuring complete formal verification sign-off for complex blocks.

The position offers unique opportunities to collaborate with full-stack software, hardware, ASIC Design, Emulation, and Post-Silicon teams to achieve first-pass silicon success. You'll be instrumental in proposing and implementing Formal Verification Methodology across the group, working closely with Architecture and Design teams on specifications and implementation.

The ideal candidate should have at least 2 years of experience in Formal Verification, with expertise in various applications including Datapath, sequential equivalence, and Clock Gating. Strong knowledge of hardware description languages like SystemVerilog and scripting languages such as Python is essential. The role requires both technical expertise and strong collaborative skills, as you'll be working with cross-functional teams and providing training to internal teams.

Meta offers a dynamic work environment where you'll be at the forefront of data center technology innovation. The company's mission to connect people and build communities extends to its hardware infrastructure, making this an exciting opportunity for someone passionate about hardware verification and scalable solutions. Working at Meta means contributing to technologies that impact billions of users while pushing the boundaries of what's possible in hardware engineering.