ASIC Engineer, Formal Verification

Meta is seeking an experienced ASIC Formal Verification Engineer to join their Infrastructure organization. This role presents an exciting opportunity to work on cutting-edge technology in Meta's data center applications, focusing on IP and System On Chip (SoC) development.

As an ASIC Formal Verification Engineer, you'll be joining an elite team of industry experts dedicated to developing innovative ASIC solutions. Your primary responsibilities will include developing comprehensive formal testplans and ensuring complete formal verification sign-off for complex blocks. This position offers extensive opportunities to collaborate across multiple teams, including full stack software, hardware, ASIC Design, Emulation, and Post-Silicon teams, all working together to achieve first-pass silicon success.

The ideal candidate will bring strong technical leadership in Formal Verification, with the ability to propose and implement methodologies that can be used across the group. You'll work closely with Architecture and Design teams to develop formal-driven specifications and implementations, while also building and maintaining reusable verification environments.

Meta offers a competitive compensation package ranging from $173,000 to $249,000 annually, plus bonus and equity opportunities. The company's comprehensive benefits package demonstrates their commitment to employee well-being and work-life balance. Working at Meta means being at the forefront of social technology innovation, particularly as the company moves beyond traditional platforms into immersive experiences like augmented and virtual reality.

This role requires a minimum of 5 years of experience in Formal Verification, along with expertise in hardware description languages and scripting. You'll be based in the San Francisco Bay Area, working with some of the industry's brightest minds on projects that will shape the future of digital communication and virtual experiences.

Join Meta to be part of a team that's pushing the boundaries of what's possible in hardware verification and contributing to the next evolution of social technology infrastructure.