ASIC Package Engineer SI/PI

Meta is seeking an experienced ASIC Packaging Engineer specializing in Signal Integrity and Power Integrity for their ASIC packaging team. This role is crucial in supporting the development of custom Silicon for Infrastructure and creating optimal packaging solutions for their ASIC roadmap. The position involves working with cutting-edge technology in machine learning clusters, both server and fabric implementations.

The role requires deep expertise in hardware development and integration, with a focus on chip-package-system co-design, signal and power integrity analysis, and high-speed interface development. You'll be responsible for leading ASIC package SI/PI design activities, conducting simulations, and developing validation methodologies.

As an ASIC Package Engineer at Meta, you'll work with state-of-the-art 2.5D/3D package technology and collaborate with cross-functional teams including Architecture, ASIC, Mixed Signal, Package, and PCB Design teams. The position offers competitive compensation ranging from $173,000 to $249,000 annually, plus bonus and equity opportunities.

The ideal candidate will have 10+ years of experience in signal integrity analysis, strong proficiency with industry-standard simulation tools, and extensive knowledge of high-speed interconnects. This is an excellent opportunity to join Meta's world-class engineering team and contribute to the development of next-generation technology infrastructure.

Meta offers a comprehensive benefits package and promotes an inclusive work environment, making it an attractive opportunity for experienced professionals looking to make a significant impact in the field of ASIC packaging and system design.