Principal Design Verification Engineer

Microsoft is seeking a principal design verification engineer to work in the dynamic Microsoft Artificial Intelligence System on Chip (AISoC) Silicon team. The candidate will be responsible for delivering cutting-edge, custom IP and SoC designs that can perform complex and high-performance functions in an extremely efficient manner.

Key responsibilities include:

• Owning or leading verification of complex flows at the SOC, subsystem, or IP levels
• Defining verification strategies and test plans
• Developing verification environments and running/debugging simulations to drive quality
• Applying random-stimulus and coverage-based techniques to find bugs and meet test plan goals
• Innovating to improve verification efficiency through methodologies or tools
• Coaching and mentoring others in areas of expertise

The ideal candidate should have:

• 15 or more years of experience in design verification with a proven track record of delivering complex CPU or SoC IP's
• Experience with verification for multiple product cycles from definition to silicon
• Substantial background in debugging RTL (Verilog) designs and simulation/emulation environments
• Proficiency in scripting languages such as Python or Perl

Desirable skills include:

• Hands-on experience in Formal property verification
• Knowledge of high-speed protocols like DDR/HBM, PCIe, Ethernet
• Experience working on AI/ML SoCs

This role offers the opportunity to work on cutting-edge technology in a collaborative environment, with a focus on innovation and empowering others to achieve more.