Principal Logic Engineer
Description For Principal Logic Engineer
Microsoft Silicon, Cloud Hardware, and Infrastructure Engineering (SCHIE) is seeking a Principal Logic Engineer to join their team responsible for Microsoft's expanding Cloud Infrastructure. This role is crucial in the Cloud Compute Development Organization (CCDO), focusing on hardware manufacturing and infrastructure deployment. The position requires expertise in high-performance DRAM memory controllers and DDR4/5 PHYs.
The ideal candidate will bring 9+ years of technical engineering experience with deep knowledge in DRAM Memory Controller design. You'll be working on critical infrastructure that powers Microsoft's vast network of online services including Azure, Office 365, Xbox Live, and Teams. This role offers an opportunity to impact Microsoft's cloud infrastructure at a global scale.
The position combines technical expertise with strategic thinking, requiring someone who can architect and implement complex memory systems while collaborating with various teams. You'll be responsible for ensuring high-quality designs from multiple perspectives, including functionality, timing, and system integration.
Microsoft offers a comprehensive benefits package and promotes a culture of inclusion and growth. The role provides a unique opportunity to work on cutting-edge technology while contributing to Microsoft's mission of empowering every person and organization on the planet to achieve more. With hybrid work options and competitive compensation, this position represents an excellent opportunity for experienced engineers looking to make a significant impact in cloud infrastructure development.
Responsibilities For Principal Logic Engineer
- Microarchitect major blocks of a DRAM Memory Controller and implement the design with high quality in Verilog RTL
- Interface with PHY vendor
- Work closely with front end design and physical design teams
- Implement additional required functional units in Verilog
- Ensure high quality design from functionality, timing, CDC, RDC, and LEC perspectives
Requirements For Principal Logic Engineer
- 9+ years of related technical engineering experience or equivalent combination of education and experience
- 8+ years of experience with DDR4 or DDR5 DRAM Memory Controller design
- Knowledge of JEDEC DDR5 Specification
- Fluency in Verilog and System Verilog
- Experience with DRAM PHY and Interface Protocol (DFI)
- High speed digital design experience
- Must pass Microsoft Cloud Background Check
Benefits For Principal Logic Engineer
- Industry leading healthcare
- Educational resources
- Discounts on products and services
- Savings and investments
- Maternity and paternity leave
- Generous time away
- Giving programs
- Opportunities to network and connect
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