Senior Engineer Circuit Designer
Description For Senior Engineer Circuit Designer
Microsoft's Silicon, Cloud Hardware, and Infrastructure Engineering (SCHIE) team is seeking a Senior Engineer Circuit Designer to join their expanding Cloud Infrastructure division. This role is crucial in powering Microsoft's "Intelligent Cloud" mission, which supports over 200 online businesses including Bing, MSN, Office 365, Xbox Live, Teams, OneDrive, and the Microsoft Azure platform globally.
The position offers a competitive salary range of $117,200 - $229,200 per year (higher in SF and NYC areas) and requires 7+ years of technical engineering experience. The role focuses on developing Memory SRAM and Register file solutions, working with advanced process technologies, and collaborating with SoC designers to tackle complex PPA challenges.
As a Senior Engineer Circuit Designer, you'll be instrumental in defining and delivering operational measures of success for hardware manufacturing, improving planning processes, quality, delivery, scale, and sustainability related to Microsoft cloud hardware. The role requires expertise in SRAM and Register File design, timing, power, and EMIR characterization, with a strong understanding of process technology and DTCO.
The position offers a hybrid work environment with up to 50% work from home flexibility and minimal travel requirements (0-25%). Microsoft provides comprehensive benefits including industry-leading healthcare, educational resources, parental leave, and investment opportunities. The company's commitment to diversity and inclusion ensures equal opportunities for all qualified applicants.
This is an excellent opportunity for experienced engineers passionate about customer-focused solutions and interested in shaping the future of cloud infrastructure technology. You'll be working with cutting-edge technology while contributing to Microsoft's global cloud operations and infrastructure development.
The role combines technical expertise with leadership opportunities, as you'll be providing technical guidance to other engineers and managing multiple SoC programs. Success in this position requires excellent communication skills, strong debug capabilities, and the ability to work effectively in a collaborative environment.
Responsibilities For Senior Engineer Circuit Designer
- Collaborate with SoC designers to develop Memory SRAM and Register file solutions
- Work with internal and external process technology teams to understand and exploit advanced process DTCO knobs
- Devise methodologies for statistical analysis and timing/power/EMIR characterization
- Run quality assurance checks on IP collateral
- Develop IP and post-silicon characterization plans for advanced process technology testchips
- Develop scripting automation for flows
Requirements For Senior Engineer Circuit Designer
- 7+ years of related technical engineering experience or Bachelor's with 4+ years experience or Master's with 3+ years experience or PhD
- 5+ years of experience in SRAM or Register file design
- 5+ years of experience in timing, power, EMIR characterization
- Experience in SRAM and Register File design in advanced process technologies
- Understanding of SRAM write and read assist techniques
- Understanding of process technology and DTCO
- Understanding of layout and provide guidance to layout design
- Experience in yield and reliability
- Experience in providing technical guidance to other engineers
- Excellent debug skills
Benefits For Senior Engineer Circuit Designer
- Industry leading healthcare
- Educational resources
- Discounts on products and services
- Savings and investments
- Maternity and paternity leave
- Generous time away
- Giving programs
- Opportunities to network and connect
