Senior Silicon Engineer

Microsoft Silicon, Cloud Hardware, and Infrastructure Engineering team powers Microsoft's cloud infrastructure and 200+ online businesses.
Embedded
Staff Software Engineer
Hybrid
5,000+ Employees
8+ years of experience
Enterprise SaaS · Cloud

Description For Senior Silicon Engineer

Microsoft Silicon, Cloud Hardware, and Infrastructure Engineering (SCHIE) is seeking a Senior Silicon Engineer to join their Data Processing Unit (DPU) team. This role focuses on developing cutting-edge, high-performance, and low-power DPU silicon solutions that power Microsoft's vast cloud infrastructure. The position offers unique opportunities to work on planet-scale impact projects, combining deep technical expertise in silicon design with cloud infrastructure innovation. The role involves complex SoC development, RTL design, and close collaboration with software teams. This is a highly visible position that provides exposure to various technical domains while solving challenging engineering problems in Microsoft's datacenter infrastructure. The role offers comprehensive benefits and the opportunity to work with industry-leading technology in a hybrid work environment.

Last updated a month ago

Responsibilities For Senior Silicon Engineer

  • RTL micro-architecture and design
  • Solving complex problems in a datacenter
  • Interact with software team to co-develop programmable silicon implementation
  • Design and implement high performance, low power, scalable and programmable DPU silicon

Requirements For Senior Silicon Engineer

  • BS and/or MS in Electrical Engineering or equivalent degree
  • 8+ years of RTL design and/or architecture experience
  • Knowledge of Compression, hardware offloading, programmable logic
  • Experience with DDR and DDR controllers (preferred)
  • Experience with ARM/RISC-V processor (preferred)
  • Experience with PCI-e (preferred)
  • Proven track record with complex SoCs development
  • Understanding of low power microarchitecture techniques
  • Strong knowledge of Verilog, System Verilog, Synthesis and Static Timing Analysis
  • Self-motivated and able to work effectively both independently and in a team

Benefits For Senior Silicon Engineer

Medical Insurance
Education Budget
Parental Leave
  • Industry leading healthcare
  • Educational resources
  • Discounts on products and services
  • Savings and investments
  • Maternity and paternity leave
  • Generous time away
  • Giving programs
  • Opportunities to network and connect

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