Silicon Engineer 2
Description For Silicon Engineer 2
Microsoft's Silicon, Cloud Hardware, and Infrastructure Engineering (SCHIE) team is seeking a Silicon Engineer 2 to join their Data Processing Unit (DPU) team. This role offers an opportunity to work on planet-scale silicon solutions within Azure Hardware Systems & Infrastructure group. You'll be part of the front-end silicon team, responsible for delivering cutting-edge DPU silicon solutions that power Microsoft's vast cloud infrastructure.
The position involves complex RTL micro-architecture design and implementation, requiring expertise in hardware engineering and silicon design. You'll work closely with software teams to develop programmable silicon solutions, making this role highly visible and impactful. The role offers exposure to various domains required for DPU silicon development, providing an excellent platform for professional growth.
As part of Microsoft's SCHIE team, you'll contribute to the infrastructure powering over 200 online businesses including Azure, Bing, Office 365, and Xbox Live. The role combines technical depth with broad impact, offering the perfect opportunity for experienced engineers to tackle challenging problems in cloud infrastructure.
The position offers comprehensive benefits including industry-leading healthcare, educational resources, parental leave, and investment opportunities. Working in a hybrid environment with up to 50% work from home flexibility, you'll be part of a team focused on smart growth and high efficiency in delivering trusted experiences to customers worldwide.
Responsibilities For Silicon Engineer 2
- RTL micro-architecture and design
- Solving complex problems in a datacenter
- Interact with software team to co-develop programmable silicon implementation
- Deliver cutting-edge, high performance, low power, scalable and programmable DPU silicon
Requirements For Silicon Engineer 2
- BS and/or MS in Electrical Engineering or equivalent degree
- 5+ years of RTL design and/or architecture experience
- Knowledge of Compression, hardware offloading, programmable logic
- Experience with high performance design techniques
- Strong knowledge of Verilog, System Verilog, Synthesis and Static Timing Analysis
- Understanding of low power microarchitecture techniques
- Experience with complex SoCs, processors and peripheral interconnect bus protocols
Benefits For Silicon Engineer 2
- Industry leading healthcare
- Educational resources
- Discounts on products and services
- Savings and investments
- Maternity and paternity leave
- Generous time away
- Giving programs
- Opportunities to network and connect
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