ASIC Design Engineer - New College Grad 2025
Description For ASIC Design Engineer - New College Grad 2025
NVIDIA is seeking an ASIC Design Engineer to join their digital logic interconnect design team. This role focuses on implementing logic for next-generation GPU's and SOCs, enabling high-performance interconnect of multi-GPU/CPU/DPU system topologies. The position involves working on cutting-edge solutions for autonomous machines, Cloud and Data Centers, Deep Learning, High-Performance Computing, Gaming, and Entertainment.
As a team member, you'll be responsible for micro-architectural definition, RTL coding, logic debug, timing closure, power optimization, and verification support. The role offers an opportunity to work with industry-standard protocols like PCIE, CXL, AXI, CHI, UCIe USB, and SATA.
NVIDIA is renowned as one of the technology world's most desirable employers, known for its forward-thinking approach and innovative workforce. The position offers competitive compensation, including equity and comprehensive benefits. The company strongly values diversity and maintains an equal opportunity workplace, fostering an inclusive environment for all employees.
This role is perfect for creative and autonomous individuals passionate about crafting high-performance, low-power silicon solutions. You'll be working with cutting-edge technology while contributing to NVIDIA's success in this rapidly growing field.
Responsibilities For ASIC Design Engineer - New College Grad 2025
- Micro architecting the next generation of PCIE PL and DL
- Implementing readable, high-performance, area and power efficient RTL
- Collaborating with architects, external partners, software engineers and circuit designers
- Partnering with Physical Design team on partitioning, floorplanning and timing closure
- Providing design documentation, triaging and debugging functional and performance bugs
Requirements For ASIC Design Engineer - New College Grad 2025
- Bachelors Degree in EE, CS or CE
- Experience in coding PCIE PL/DL logic or lower layers of the OSI stack
- In-depth understanding of physical design
- Strong working knowledge of Verilog or System Verilog
- Strong collaboration and communication skills
Benefits For ASIC Design Engineer - New College Grad 2025
- Equity
- Comprehensive benefits package
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