ASIC Engineer
Description For ASIC Engineer
NVIDIA, a global leader in accelerated computing and AI technology, is seeking an ASIC Engineer to join their innovative hardware engineering team in Bengaluru. This role offers an opportunity to work on cutting-edge GPU, CPU, and SoC designs that power data centers, machine learning, autonomous driving, and ray tracing applications.
The position involves working with state-of-the-art hardware designs, from architecture to implementation, focusing on performance optimization, verification, and system integration. You'll be part of a team that's pushing the boundaries of technology in graphics processing, artificial intelligence, and high-performance computing.
As an ASIC Engineer, you'll be responsible for developing complex hardware models, working on architectural trade-offs, implementing RTL designs, and ensuring robust verification processes. The role requires a strong background in digital design and ASIC development, with opportunities to work on various aspects of hardware development from micro-architecture to silicon validation.
NVIDIA offers a supportive and diverse environment where innovation is encouraged and individual contributions are valued. The company has a strong track record of technological breakthroughs and continues to lead in various domains including AI, gaming, and automotive technology. This role provides an excellent opportunity for professional growth while working on technologies that are shaping the future of computing.
The ideal candidate will bring 2+ years of experience in micro-architecture and RTL development, along with a deep understanding of ASIC design flow. You'll be joining a company that's at the forefront of technological innovation, offering competitive compensation and the chance to work on projects that have global impact.
Responsibilities For ASIC Engineer
- Work on hardware models of different levels of extraction, including performance models, RTL test benches and emulators
- Work with architecture and design teams to explore architecture trade-offs
- Develop workloads and test suites for graphics, machine learning, automotive applications
- Make architectural trade-offs based on feature/performance/power requirements
- Develop test plans and verification infrastructure for complex IPs/sub-system/SOCs
- Create verification environment using UVM methodology
- Drive functional coverage driven verification closure
- Develop timing analysis/signoff work-flow
- Perform chip level integration and floor planning
- Design and implement test access mechanisms, IO BIST, memory BIST and scan compression
Requirements For ASIC Engineer
- BTech/MTech with 2+ years of experience in micro-architecture, RTL development
- Strong digital design fundamentals
- Understanding of ASIC design flow including RTL design, verification, logic synthesis
- Experience with GPU/CPU/SOC Performance verification and analysis
- Knowledge of CPU, Memory controller, Bus Interconnect, Cache coherency
- Good debugging and analytical skills
- Excellent communication skills
- Experience with FPGA Prototype
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