ASIC Verification Engineer

NVIDIA is the world leader in accelerated computing, pioneering accelerated computing to tackle challenges no one else can solve.
Backend
Mid-Level Software Engineer
Hybrid
2+ years of experience
AI

Description For ASIC Verification Engineer

NVIDIA is seeking an ASIC Verification Engineer to join their team in Bengaluru, India. This role involves planning and implementing IP/Cluster/SOC functional verification for Graphics Processors and Tegra SOCs. The ideal candidate will have 2+ years of design experience and a strong background in ASIC verification of complex design units.

Key responsibilities include:

  • Owning ASIC verification of IP/Cluster for complicated designs in RTL
  • Working with HW architects and designers on implementation choices
  • Interacting with Performance verification teams
  • Ensuring functional and code coverage of all RTL
  • Partnering with FPGA and S/W teams
  • Involvement in post-silicon verification and debug

Required qualifications:

  • BS / MS or equivalent experience
  • 2+ years of design experience
  • Experience in ASIC verification of complex design units
  • Background with design and verification tools (VCS or equivalent, Debussy, GDB)
  • Exposure to System Verilog and UVM based methodology

Desired skills:

  • Knowledge of Memory controllers
  • Good debugging and problem-solving skills
  • Scripting knowledge (Python/Perl/shell)
  • Strong interpersonal skills and teamwork ability

NVIDIA offers a diverse, supportive environment where employees can make a lasting impact on the world through their work in artificial intelligence, parallel computing, and graphics processing.

Last updated 5 months ago

Responsibilities For ASIC Verification Engineer

  • Own ASIC verification of IP/Cluster for complicated designs in RTL
  • Work with HW architects and designers to make the right implementation choices
  • Interact with the Performance verification teams to augment verification through dynamic simulations and/or Formal verification techniques
  • Work with specifications and ensure functional and code coverage of all the RTL to be verified
  • Partner with and enable FPGA and S/W teams to ensure that S/W is tested
  • Be involved with post-silicon verification and debug

Requirements For ASIC Verification Engineer

Python
  • BS / MS or equivalent experience
  • 2+ years of design experience
  • Experience in ASIC verification of complex design units for at least one or two projects
  • Background with design and verification tools (VCS or equivalent simulation tools, debug tools like Debussy, GDB)
  • Exposure to System Verilog and UVM based methodology for ASIC verification

Interested in this job?

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