ASIC Verification Engineer

NVIDIA, a pioneer in GPU technology and AI innovation, is seeking an ASIC Verification Engineer to join their team in Hyderabad, India. This role is crucial in implementing cutting-edge verification methodologies for Design-for-Test (DFT) IP at unit and system levels.

As an ASIC Verification Engineer, you will:

• Build state-of-the-art verification test benches for complex IPs, sub-systems, and SOCs
• Develop and own verification environments using UVM or equivalent
• Create reusable bus functional models, monitors, checkers, and scoreboards
• Drive functional coverage-driven verification closure and own design verification sign-offs
• Collaborate with multi-functional teams including chip architecture, ASIC design, functional verification, and post-silicon teams
• Contribute to innovation in improving DFT methods

The ideal candidate will have:

• BSEE with 3+ or MSEE with 2+ years of experience in DFT verification or related domains
• Expertise in SystemVerilog and UVM/VMM verification methodologies
• Proficiency with prototyping, verification, and debug tools (Emulation, FPGA, VCS, Debussy, Formality, PrimeTime, etc.)
• Strong programming skills in C++, Perl, Python, or Tcl
• Excellent communication skills and problem-solving abilities

Additional valuable skills include:

• Experience in both DFT and RTL Verification domains
• Knowledge of Formal verification methodologies
• Hands-on experience in post-silicon debug on ATE and/or system labs

Join NVIDIA in their mission to amplify human imagination and intelligence through groundbreaking innovations in GPU technology, AI, and accelerated computing.