Chip Power Estimation and Optimization Engineer

NVIDIA is seeking a passionate and highly motivated engineer to work on architectural power estimation for world-leading GPUs and SOCs. This role focuses on developing advanced power models for chip and board power estimation under various product scenarios. The position offers an opportunity to impact product lines ranging from consumer graphics to self-driving cars and AI.

The role involves working with architecture, design, synthesis, timing, circuit, and post-silicon teams. You'll be responsible for understanding high-level chip architecture, application use-cases, and low power design techniques. The work includes developing estimation infrastructure and analyzing power consumption under various scenarios.

NVIDIA has revolutionized parallel computing and computer graphics, leading innovations in PC gaming, AI, and autonomous vehicles. The company maintains a learning-focused culture that constantly evolves to address new challenges. As part of NVIDIA's diverse team, you'll work in a supportive environment focused on amplifying human creativity and intelligence.

The ideal candidate should have strong fundamentals in power systems, including transistor-level characteristics and low power design techniques. Experience with Python programming and object-oriented design is essential. Knowledge of lab setup for power measurement and exposure to power analysis EDA tools would be advantageous.

Join NVIDIA's global team of outstanding professionals who are pushing the boundaries of technology and defining the future of computing. This role offers the chance to contribute to groundbreaking innovations in GPU technology, artificial intelligence, and parallel computing solutions.