Senior ASIC Design Engineer

World leader in accelerated computing, pioneering AI and digital twins technology transforming major industries.
$164,000 - $304,750
Embedded
Senior Software Engineer
Hybrid
5,000+ Employees
8+ years of experience
AI · Automotive

Description For Senior ASIC Design Engineer

NVIDIA, the world leader in accelerated computing, is seeking a Senior ASIC Design Engineer to join their GPU Design team. This role offers a unique opportunity to work on cutting-edge technology impacting various product lines from consumer graphics to self-driving cars and artificial intelligence.

As a Senior ASIC Design Engineer, you'll be responsible for implementing world-leading SoCs and GPUs, working with state-of-the-art technology in a global team environment. The position involves crafting micro-architecture, implementing RTL, and delivering fully verified designs that meet high-performance standards.

The role requires expertise in ASIC design flow, RTL development, and computer architecture, with opportunities to work on crucial components like GPU work schedulers, time distribution systems, and DMA engines. You'll collaborate with cross-functional teams including architects, designers, and verification specialists.

NVIDIA offers a competitive compensation package, including a base salary range of $164,000 - $304,750 USD, plus equity and comprehensive benefits. The company is known for its innovative culture and commitment to pushing technological boundaries, particularly in AI and digital twins technology.

This is an excellent opportunity for experienced engineers who want to impact the future of computing technology while working with one of the most forward-thinking teams in the industry. NVIDIA's work spans multiple cutting-edge fields, offering continuous learning and growth opportunities in a dynamic, inclusive environment.

Last updated a month ago

Responsibilities For Senior ASIC Design Engineer

  • Implement, document and deliver high performance, area and power efficient RTL
  • Analyze architectural trade-offs based on features, performance requirements and system limitations
  • Craft micro-architecture, implement in RTL, and deliver fully verified, synthesis/timing clean design
  • Collaborate with architects, designers, verification teams, synthesis, timing and back-end teams
  • Work on IPs such as GPU's work scheduler, time distribution system, interrupt controllers, and DMA engines
  • Architect features to help silicon debug and support post-silicon validation activities

Requirements For Senior ASIC Design Engineer

Python
  • Bachelors Degree in Electrical Engineering, Computer Engineering or Computer Science
  • 8+ years of meaningful work experience
  • Experience in micro-architecture and RTL development (Verilog)
  • Understanding of ASIC design flow including RTL design, verification, logic synthesis and timing analysis
  • Knowledge of Digital systems and VLSI design, Computer Architecture, and Computer Arithmetic
  • Strong interpersonal skills and excellent teamwork
  • Strong C/C++, Python or Perl skills (preferred)
  • Good debugging and analytical skills (preferred)

Benefits For Senior ASIC Design Engineer

Equity
  • Equity

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