Senior ASIC Design Engineer

NVIDIA is the world leader in accelerated computing, pioneering solutions in AI and digital twins.
$168,000 - $310,500
Embedded
Senior Software Engineer
Hybrid
5,000+ Employees
8+ years of experience
AI · Automotive

Description For Senior ASIC Design Engineer

NVIDIA, the world leader in accelerated computing, is seeking a Senior ASIC Design Engineer to join their GPU Design team. This role offers a unique opportunity to work on cutting-edge technology impacting various product lines from consumer graphics to self-driving cars and artificial intelligence. The position involves implementing world-leading SoCs and GPUs, working with a global team of outstanding professionals.

As a Senior ASIC Design Engineer, you'll be responsible for developing high-performance RTL designs, analyzing architectural trade-offs, and collaborating with cross-functional teams. The role requires expertise in micro-architecture, RTL development, and ASIC design flow, with opportunities to work on critical components like GPU work schedulers, time distribution systems, and DMA engines.

The ideal candidate brings 8+ years of experience, strong technical skills in ASIC design, and excellent collaborative abilities. NVIDIA offers a competitive compensation package with a base salary range of $168,000 - $310,500, plus equity and benefits. The company is known for being one of the technology world's most desirable employers, offering the chance to work on transformative technologies in a diverse and inclusive environment.

This hybrid position provides the flexibility of remote work while maintaining collaborative opportunities. Join NVIDIA to be part of a team pushing the boundaries of what's possible in computing and defining the future of technology.

Last updated 2 days ago

Responsibilities For Senior ASIC Design Engineer

  • Implement, document and deliver high performance, area and power efficient RTL
  • Analyze architectural trade-offs based on features, performance requirements and system limitations
  • Craft micro-architecture, implement in RTL, and deliver fully verified, synthesis/timing clean design
  • Collaborate with architects, designers, verification teams, synthesis, timing and back-end teams
  • Work on GPU's work scheduler, time distribution system, interrupt controllers, and DMA engines
  • Architect features to help silicon debug and support post-silicon validation activities

Requirements For Senior ASIC Design Engineer

Python
  • Bachelors Degree or equivalent experience in Electrical Engineering, Computer Engineering or Computer Science
  • 8+ years of meaningful work experience
  • Experience in micro-architecture and RTL development (Verilog)
  • Understanding of ASIC design flow including RTL design, verification, logic synthesis and timing analysis
  • Knowledge of Digital systems and VLSI design, Computer Architecture, and Computer Arithmetic
  • Strong interpersonal skills and excellent teamwork
  • Strong C/C++, Python or Perl skills (preferred)
  • Good debugging and analytical skills (preferred)

Benefits For Senior ASIC Design Engineer

Equity
  • Equity

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