Senior ASIC Verification Engineer
Description For Senior ASIC Verification Engineer
NVIDIA's Clocks Team is seeking a Senior ASIC Verification Engineer to join their innovative team. This role is crucial in delivering high-quality clocking and reset logic for various units in SOC and GPU ASIC. The position offers an opportunity to work on cutting-edge products ranging from Data Centers and Consumer graphics to Self-driving cars and AI applications.
The role involves sophisticated verification work to ensure bug-free clock design across NVIDIA's diverse product lines. You'll be working with state-of-the-art verification methodologies and tools, including System Verilog, UVM, C++, and Python. The position requires strong technical expertise in ASIC verification and the ability to develop scalable solutions.
As a Senior ASIC Verification Engineer, you'll be responsible for end-to-end validation of clocking structures, developing test plans, and ensuring comprehensive coverage metrics. You'll work closely with design teams to understand architecture and collaborate with Quality Assurance engineers to improve hardware quality.
NVIDIA offers a competitive compensation package, including a base salary range of $128,000 - $258,750 USD, equity, and comprehensive benefits. The company is known for its forward-thinking approach and commitment to innovation in AI and accelerated computing. This is an excellent opportunity for someone passionate about technology and interested in working at the forefront of hardware verification for AI and autonomous systems.
Responsibilities For Senior ASIC Verification Engineer
- Own validation of Clocking structures in Tegra SOC GPU ASIC products
- Develop test plans, automation, and validation flows
- Tackle sophisticated problems and develop scalable solutions
- Work with industry-standard tools and verification methodologies
- Partner with design team to understand architecture
- Collaborate with Quality Assurance engineers
- Coordinate with internal and external teams across time zones
Requirements For Senior ASIC Verification Engineer
- BS or MS in EE/ECE or equivalent experience
- 5+ years of relevant industry work experience
- Good understanding of Logic Design and Architecture
- Expertise in industry-standard verification flows
- Experience with SV constraint random verification, UVM, Formal Verification
- Strong coding skills in System Verilog, scripting languages (Perl/python) and C++
- Prior experience in implementing Test plans for pre-silicon platforms
- Ability to collaborate and work with multiple groups
Benefits For Senior ASIC Verification Engineer
- Equity
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