Senior ASIC Verification Engineer, Coherent High Speed Interconnect
Description For Senior ASIC Verification Engineer, Coherent High Speed Interconnect
NVIDIA, a global leader in accelerated computing and GPU technology, is seeking a Senior ASIC Verification Engineer to join their Coherent High Speed Interconnect team. For over two decades, NVIDIA has been at the forefront of visual computing and GPU technology, revolutionizing various fields from gaming to AI. The role focuses on verifying the design and implementation of innovative high-speed coherent interconnects for mobile SoCs and GPUs.
As a Senior ASIC Verification Engineer, you'll be instrumental in ensuring the quality and reliability of NVIDIA's cutting-edge interconnect technologies. The position offers a unique opportunity to work on products ranging from consumer graphics to self-driving cars and artificial intelligence applications. You'll be responsible for verification of high-speed coherent interconnect design, architecture, and golden models, while collaborating with cross-functional teams including architects, designers, and silicon verification specialists.
The ideal candidate brings 3+ years of verification experience, strong technical skills in System Verilog, C++, and UVM methodology, and a deep understanding of hardware verification principles. You'll work with industry-standard protocols like PCIE, CXL, and CHI, while utilizing sophisticated verification methodologies to ensure product excellence.
NVIDIA offers a competitive compensation package with a base salary range of $136,000 to $264,500, plus equity and comprehensive benefits. The company is committed to fostering diversity and inclusion, making it an ideal workplace for innovative minds. This role provides an excellent opportunity to contribute to groundbreaking technology that's shaping the future of computing, from AI and deep learning to autonomous vehicles and beyond.
Responsibilities For Senior ASIC Verification Engineer, Coherent High Speed Interconnect
- Verify high-speed coherent interconnect design, architecture and golden models
- Responsible for micro-architecture using sophisticated verification methodologies
- Define verification scope
- Develop verification infrastructure (Testbenches, BFMs, Checkers, Monitors)
- Complete test/coverage plans
- Verify design correctness
- Collaborate with architects, designers, emulation, and silicon verification teams
Requirements For Senior ASIC Verification Engineer, Coherent High Speed Interconnect
- Bachelors or Master's Degree (or equivalent experience)
- 3+ years of relevant verification experience
- Experience in architecting test bench environments for unit level verification
- Background in verification using random stimulus with functional coverage and assertion-based verification methodologies
- Prior Design or Verification experience of Coherent high-speed interconnects
- Knowledge of industry standard interconnect protocols like PCIE, CXL, CHI
- Strong background developing TB's using SV and UVM methodology
- C++ programming language experience
- System Verilog expertise
- Experience with design and verification tools (VCS or equivalent)
- Strong debugging and analytical skills
- Strong communication and interpersonal skills
Benefits For Senior ASIC Verification Engineer, Coherent High Speed Interconnect
- Equity
- Benefits package
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