Senior CDC and STA Engineer

NVIDIA, a pioneering technology company that revolutionized the GPU industry and modern AI computing, is seeking a Senior CDC and STA Engineer to join their Networking Silicon engineering team. This role is crucial in developing industry-leading high-speed communication devices that deliver maximum throughput and minimal latency.

As a Senior CDC and STA Engineer, you'll be at the forefront of analyzing and optimizing designs for NVIDIA's cutting-edge DPUs and SOCs. Your expertise in Clock Domain Crossing (CDC), Reset Domain Crossing (RDC), and Static Timing Analysis (STA) will be essential in ensuring the highest quality and performance of our semiconductor products.

The position offers an exciting opportunity to work with state-of-the-art tools and technologies, including Synopsys PrimeTime, Spyglass, and VC-Static, while collaborating with a team of exceptional engineers. You'll be responsible for developing and maintaining crucial timing constraints and methodologies across various levels of chip design, from block level to full chip implementation.

NVIDIA provides a competitive compensation package, including a base salary range of $128,000 to $258,750, plus equity and comprehensive benefits. The company is known for its innovative culture and commitment to pushing technological boundaries, particularly in AI computing and high-performance hardware development.

This role is perfect for someone who combines strong technical expertise in timing analysis and hardware design with excellent collaborative skills. You'll be joining a company that's at the forefront of AI computing revolution, working on projects that have real-world impact and contributing to groundbreaking technological advancements.