Senior CDC and STA Engineer
Description For Senior CDC and STA Engineer
NVIDIA, a global leader in accelerated computing and AI technology, is seeking a Senior CDC and STA Engineer to join their Networking Silicon engineering team. This role is crucial in developing industry-leading high-speed communication devices that deliver maximum throughput and minimal latency.
The position offers an opportunity to work on groundbreaking chip development in a technology-focused environment where innovation is paramount. As a Senior CDC and STA Engineer, you'll be responsible for analyzing designs, implementing fixes, and managing timing analysis across various levels of chip development.
NVIDIA has a rich history of innovation, from inventing the GPU in 1999 to revolutionizing AI computing. The company continues to evolve and adapt to new challenges, making it an ideal place for engineers who want to make a significant impact in the technology sector.
The role combines technical expertise with collaborative teamwork, requiring both deep technical knowledge in timing analysis and the ability to work effectively with cross-functional teams. You'll be working with state-of-the-art tools and technologies, contributing to the development of next-generation computing solutions.
This position offers competitive compensation, including equity opportunities and comprehensive benefits. Join NVIDIA to be part of a diverse, forward-thinking team that's shaping the future of technology in AI, digital twins, and accelerated computing.
Responsibilities For Senior CDC and STA Engineer
- Analyze design and drive fixes for DPUs and SOCs
- Develop, maintain, and improve Lint, Clock Domain Crossing (CDC), Reset Domain Crossing (RDC) and Static Timing Analysis (STA) constraints
- Analyze and optimize the CDC and RDC sign-offs for DPUs and SOCs
- Develop and maintain key CDC/STA checks and associated sign-offs
- Help in driving frontend and backend assertions for CDC/RDC/STA constraints
Requirements For Senior CDC and STA Engineer
- BS (or equivalent experience) in Electrical or Computer Engineering
- Minimum 5+ years experience or MS with 4 years experience in Synthesis and Timing
- Expertise in Static Timing Analysis (STA), Clock-Domain Crossing (CDC), and Reset Domain Crossing (RDC) solutions
- Experience in critical path planning and crafting needed solutions
- Power user of tools like Synopsys PrimeTime, Spyglass, VC-Static, or Meridian
- Solid experience in full-chip/sub-chip Static Timing Analysis
- Proficiency in Python, Tcl and Make for automation and scripting tasks
Jobs Related To NVIDIA Senior CDC and STA Engineer
