Senior CPU-Memory Management Design Engineer

World leader in accelerated computing, pioneering AI and digital twins technology transforming major industries.
$150,000 - $250,000
Embedded
Staff Software Engineer
In-Person
5,000+ Employees
8+ years of experience
AI · Enterprise SaaS

Description For Senior CPU-Memory Management Design Engineer

NVIDIA, a global leader in accelerated computing, is seeking a Senior CPU-Memory Management Design Engineer to join their CPU MEM-Logic Design Team. This role focuses on designing high-performance, low-power chips with emphasis on CPU's Memory Management related logic (L1/L2/L3). The position offers a unique opportunity to impact product lines roadmap in a dynamic, technology-focused company.

As a team member, you'll be responsible for crucial aspects of memory management design, including microarchitectural definition, RTL coding, logic debug, and supporting verification and BE implementation. You'll work with cutting-edge technology in memory coherency, prefetching, array control, and memory translation systems.

The ideal candidate combines technical expertise with strong collaborative skills, as you'll be working with global teams across verification and implementation domains. This role requires both creative thinking and autonomous work capability, making it perfect for someone passionate about crafting the fastest and most power-efficient chips in their class.

NVIDIA's reputation as one of technology's most desirable employers, combined with their mission to push the frontiers of computing possibilities, makes this an exceptional opportunity for experienced engineers looking to make a significant impact in the field of CPU design and memory management systems.

Last updated 3 months ago

Responsibilities For Senior CPU-Memory Management Design Engineer

  • Own and deliver specific Memory-management related logic
  • Participate in microarchitecture definitions
  • Write high quality, high performance and low power RTL
  • Collaborate with verification team to verify unit correctness
  • Work with implementation team on timing, area, performance, and power goals
  • Work on memory-management logic including coherency, prefetching, array control, and memory translation

Requirements For Senior CPU-Memory Management Design Engineer

  • Bachelor's Degree in Electrical Engineering, Computer Engineering or Computer Science, or equivalent experience
  • 8+ years of experience in processor Memory Management design
  • Hardware description language expertise
  • Strong communication and interpersonal skills
  • Strong background in computer architecture
  • Experience working in a dynamic, global team

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