Senior Design for Debug Architect and Methodology Engineer

World leader in accelerated computing, pioneering AI and digital twins technology.
$168,000 - $264,500
Embedded
Senior Software Engineer
In-Person
5,000+ Employees
8+ years of experience
AI · Automotive

Description For Senior Design for Debug Architect and Methodology Engineer

NVIDIA is seeking a Senior Design for Debug (DFD) Architect to implement hardware and software solutions for debugging world-leading SoCs and GPUs. This role offers a unique opportunity to impact various technology sectors, from consumer graphics to self-driving cars and AI. The position involves architecting and implementing silicon debug capabilities, working with cutting-edge GPU technology, and collaborating across multiple teams. The ideal candidate will have extensive experience in computer architecture, RTL development, and debug methodologies. This role combines technical expertise with leadership opportunities, as you'll be mentoring junior engineers and driving critical debug infrastructure improvements. NVIDIA's position as a technology leader and their work in transformative areas like AI and digital twins makes this an exciting opportunity for someone passionate about hardware development and debug architecture.

Last updated an hour ago

Responsibilities For Senior Design for Debug Architect and Methodology Engineer

  • Architect and implement silicon debug capabilities and infrastructure for GPUs
  • Identify debug inefficiencies and deficiencies
  • Drive exploration of silicon debug features
  • Work closely with software, architecture, design, verification, and silicon validation teams
  • Train and mentor junior engineers
  • Review new features from a DFD perspective
  • Help verify DFD hardware at full-chip level

Requirements For Senior Design for Debug Architect and Methodology Engineer

Python
TypeScript
JavaScript
  • Bachelors Degree or equivalent experience in Electrical Engineering, Computer Engineering or Computer Science
  • 8+ years of meaningful work experience
  • Experience in Computer Architecture and RTL development (Verilog)
  • Expertise in design for debug techniques and methodologies
  • Understanding of ASIC design flow
  • Strong interpersonal skills
  • Experience with arbiters, scheduling, synchronization & bus protocols
  • Knowledge of interconnect networks and/or caches

Benefits For Senior Design for Debug Architect and Methodology Engineer

Equity
  • Equity

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