Senior Formal Verification Engineer
Description For Senior Formal Verification Engineer
NVIDIA, a global leader in accelerated computing and AI technology, is seeking a Senior Formal Verification Engineer to join their team in Bengaluru. This role is crucial in ensuring the quality and reliability of NVIDIA's cutting-edge hardware designs through formal verification methods.
The position offers an opportunity to work with state-of-the-art technology in GPU and CPU design verification, contributing to products that are revolutionizing parallel computing and artificial intelligence. As a Senior Formal Verification Engineer, you'll be responsible for developing and maintaining comprehensive verification flows, creating automated testing solutions, and collaborating with cross-functional teams to ensure design integrity.
The ideal candidate will bring strong expertise in formal verification techniques, hardware description languages, and CPU architectures. This role combines technical depth with leadership opportunities, including mentoring junior engineers and collaborating with global teams. NVIDIA's culture emphasizes innovation, continuous learning, and making a lasting impact on the world through technology.
Working at NVIDIA means joining a company that has continuously reinvented itself and now stands at the forefront of AI and accelerated computing. The company offers competitive compensation, comprehensive benefits, and the chance to work with some of the brightest minds in the industry. This is an excellent opportunity for someone passionate about hardware verification who wants to contribute to groundbreaking technological advancements.
Responsibilities For Senior Formal Verification Engineer
- Specification, implementation, and maintenance of integrated end-to-end formal verification flow
- Developing scripts to automate the verification process
- Review formal setups and proofs with design and verification teams
- Maintain and extend assertion libraries
- Identifying key behaviors for verification of DUT and creating verification plans
- Developing verification environment including assumptions, assertions and cover properties
- Applying FV techniques to prove correctness of digital designs
- Debugging RTL to identify failure scenarios
Requirements For Senior Formal Verification Engineer
- Bachelors/Masters in Electronics & Communications, Computer Science or Electrical Engineering
- 5+ years of industry experience in formal verification techniques
- Strong analytical skills
- Excellent command of scripting
- Strong knowledge of CPU architectures and digital logic
- Understanding of abstraction techniques
- Experience with HDLs like Verilog/System Verilog
- Understanding of temporal logic assertions
- Experience with Formal Verification Tools
- Strong communication skills
- Ability to work in dynamic team environments
Benefits For Senior Formal Verification Engineer
- Competitive salaries
- Generous benefits package
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