Senior Memory Controller Verification Engineer

NVIDIA is the world leader in accelerated computing, pioneering solutions in AI and digital twins.
$136,000 - $264,500
Embedded
Senior Software Engineer
In-Person
5000+ Employees
5+ years of experience
AI · Automotive · Enterprise SaaS

Description For Senior Memory Controller Verification Engineer

NVIDIA, the world leader in accelerated computing, is seeking a Senior Memory Controller Verification Engineer for their Tegra SoCs. This role offers a unique opportunity to impact multiple product lines including consumer graphics, self-driving cars, HPC, cloud computing, and AI. As a senior verification team member, you'll work on cutting-edge memory controller technology, collaborating with designers and DRAM vendors on next-generation LPDDR and DDR memories. The position requires strong technical expertise in ASIC verification, memory controllers, and programming skills. You'll be responsible for developing verification infrastructure, implementing test plans, and ensuring design correctness. The role combines technical depth with collaborative teamwork, offering competitive compensation and the chance to work on transformative technology. NVIDIA's innovative culture and global impact make this an excellent opportunity for experienced verification engineers looking to advance their careers in a leading technology company.

Last updated 6 minutes ago

Responsibilities For Senior Memory Controller Verification Engineer

  • Understand design & implementation, define verification scope
  • Develop verification infrastructure (Testbenches, BFMs, Checkers, Monitors)
  • Implement test/coverage plans and verify design correctness
  • Collaborate with memory controller designers and DRAM vendors
  • Ensure code and functional coverage of RTL
  • Work with FPGA and software teams
  • Participate in post-silicon verification and debug

Requirements For Senior Memory Controller Verification Engineer

Python
  • BS / MS or equivalent experience
  • 5+ years of hands-on ASIC verification experience
  • Prior Design or Verification experience of dynamic memory controllers
  • Experience with design and verification tools (VCS or equivalent)
  • Background with System Verilog and UVM based methodology
  • Strong C/C++ programming experience
  • Scripting knowledge (Python/Perl/shell)

Benefits For Senior Memory Controller Verification Engineer

Equity
  • Equity

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