Senior Physical Design CAD Engineer
Description For Senior Physical Design CAD Engineer
NVIDIA, the world leader in accelerated computing, is seeking an exceptional Senior Physical Design CAD Engineer to join their Networking Silicon engineering team. This role offers an opportunity to work on industry-leading high-speed communication devices that deliver unmatched throughput and latency performance.
The position involves developing sophisticated physical design methodologies for cutting-edge networking chips and SOCs, working with state-of-the-art EDA tools from industry leaders like Synopsys and Cadence. You'll be responsible for critical aspects of chip design, from floorplanning to timing analysis and power optimization.
The ideal candidate brings 5+ years of experience in physical design, with deep expertise in EDA tools and scripting languages. You'll need strong technical skills in areas like crosstalk delay analysis, process variation modeling, and physical design optimization. The role demands both technical excellence and strong collaborative abilities, as you'll work closely with block owners, STA engineers, and project managers.
At NVIDIA, you'll be part of a team developing groundbreaking technology that's transforming major industries through AI and digital twins. This is an excellent opportunity for a skilled engineer who wants to make a significant impact in a technology-focused company that's widely considered one of the most desirable employers in the tech world.
Responsibilities For Senior Physical Design CAD Engineer
- Develop physical design, synthesis, STA and Logic eq methodologies for networking chips and SOCs
- Work with block owners, full Chip STA engineers and project managers
- Develop creative solutions for physical design problems
- Develop flow and tool methodologies for chip floorplan
- Handle power and clock distribution, P&R, timing analysis and closure
- Manage power and noise analysis and back-end verification across multiple projects
Requirements For Senior Physical Design CAD Engineer
- B.Sc./M.Sc. in Electrical Engineering/Computer Engineering or equivalent experience
- 5+ years experience with synthesis, place and route, STA EDA tools from Synopsys (DC/FC/PT), Cadence (Innovus/Tempus)
- Proficiency in Python, Perl, Tcl, Make scripting
- Expertise in analyzing crosstalk delay, noise glitch, and electrical/manufacturing rules
- Knowledge in physical design and optimization
- Experience with process variation effect modeling
- Track record of delivering designs to production
- Strong communication and presentation skills
- Self-motivated with attention to detail
- Great teamwork and ownership skills
