Senior Signal Integrity Design Engineer

NVIDIA is the world leader in accelerated computing, pioneering solutions in AI and digital twins to transform industries.
$136,000 - $471,500
Embedded
Senior Software Engineer
In-Person
5,000+ Employees
3+ years of experience
AI · Enterprise SaaS

Description For Senior Signal Integrity Design Engineer

NVIDIA, the pioneer in GPU technology and AI innovation, is seeking a Senior Signal Integrity Design Engineer to join their dynamic team. This role offers an exciting opportunity to work at the forefront of technology, focusing on complex signal integrity solutions for cutting-edge hardware systems. The position involves working with state-of-the-art technology and tools, contributing to the development of next-generation computing solutions.

The role combines hands-on technical work with cross-functional collaboration, requiring expertise in signal integrity design, system-level simulations, and laboratory measurements. You'll be working on advanced memory interfaces like GDDR7/6X, HBM3/4, and various DRAM technologies, ensuring optimal performance through sophisticated modeling and optimization techniques.

NVIDIA's culture emphasizes innovation and continuous learning, making it an ideal environment for engineers who want to push the boundaries of what's possible in hardware design. The company's work spans across AI, gaming, and enterprise computing, providing exposure to diverse and challenging projects.

The position offers competitive compensation, including a substantial base salary range and equity benefits. Located in Santa Clara, you'll be working at the heart of Silicon Valley's tech ecosystem. This role is perfect for experienced engineers who are passionate about signal integrity, hardware design, and want to contribute to groundbreaking technology development at a company that has consistently reinvented itself and led industry innovation.

Last updated a few seconds ago

Responsibilities For Senior Signal Integrity Design Engineer

  • Work on crafting creative Signal Integrity solutions to complex system design problems
  • Modeling and Optimization of vias, connectors, sockets, breakouts and system components
  • System-level signal integrity simulations in GDDR7/6X, LP5X, DDR4/5, HBM3/4, DRAM interface
  • SI model correlations using lab measurements
  • Package substrate and board layout SI design constraint creation
  • Cross-functional work to optimize package, PCB, ASIC, SerDes designs

Requirements For Senior Signal Integrity Design Engineer

  • BS/MS-Electrical Engineering or equivalent experience
  • 3+ years of industry experience
  • Experience with SI work on signaling standards (PCI express, USB, SATA, HDMI, HBM, DDR5, GDDR6, LPDDR5X)
  • Hands on experience with 3-D modeling tools like ANSYS HFSS/Q3D
  • Familiarity with system level timing or loss budget
  • Background with VNA, TDR, DSO, ParBERT and tools like ADS, Ansys Designer, JMP, Matlab, Cadence Allegro

Benefits For Senior Signal Integrity Design Engineer

Equity
  • Equity
  • Benefits package

Interested in this job?

Jobs Related To NVIDIA Senior Signal Integrity Design Engineer

Senior ASIC Timing Engineer

Senior ASIC Timing Engineer role at NVIDIA focusing on timing analysis and closure for GPUs, CPUs, and SoCs, offering competitive compensation and equity benefits.

Senior Firmware Engineer – Ethernet Switching

Senior Firmware Engineer position at NVIDIA, focusing on Ethernet Switch firmware development, requiring 8+ years of embedded systems experience and strong networking expertise.

Senior CDC and STA Engineer

Senior CDC and STA Engineer role at NVIDIA, focusing on timing analysis and optimization for high-speed communication devices.

Senior System Software Engineer

Senior System Software Engineer role at NVIDIA focusing on video processing and multimedia software development for Tegra processors, requiring 5+ years of embedded software experience.

Senior VLSI Physical Design Integration Engineer

Senior VLSI Physical Design Integration Engineer position at NVIDIA focusing on hardware design and implementation.