Senior Silicon Low Power Development Engineer

World leader in accelerated computing, pioneering AI and digital twins technology to transform industries.
$168,000 - $310,500
Embedded
Staff Software Engineer
Hybrid
5,000+ Employees
10+ years of experience
AI · Enterprise SaaS · Automotive

Description For Senior Silicon Low Power Development Engineer

NVIDIA's Silicon Solutions Group (SSG) is seeking a Senior Silicon Low Power Development Engineer to join their HW ArchDev team. This role offers a unique end-to-end view of product development, from early architecture definition through bringup to product release. The position focuses on championing and architecting silicon cross-IP power savings features with deep product understanding.

As part of the ArchDev team, you'll be at the intersection of silicon and system-level feature development, ROI analysis, and system integration solutions. The role demands expertise in power optimization, system architecture, and cross-functional collaboration with hardware, software, and platform teams.

NVIDIA, recognized as a technology world's most desirable employer, offers competitive compensation including a base salary range of $168,000 - $310,500, plus equity and comprehensive benefits. The company is committed to fostering diversity and maintains an inclusive work environment.

The ideal candidate will bring 10+ years of experience in silicon power optimization, strong analytical skills, and the ability to lead complex debug efforts. This position offers the opportunity to work on cutting-edge technology that impacts various industries through AI and accelerated computing solutions.

Working in a hybrid environment, you'll collaborate with some of the most talented professionals in the industry while contributing to NVIDIA's mission of transforming industries through innovative technology solutions.

Last updated a month ago

Responsibilities For Senior Silicon Low Power Development Engineer

  • Develop chip and system-level power savings features for new product opportunities
  • Analyze chip utilization, efficiency, and latency telemetry of key product use cases
  • Define and coordinate HW, SW, Ops, Board, and Platform requirements
  • Lead HW debug efforts to root cause feature sequences bugs
  • Deep dive into key product use cases and adapt engineering focus

Requirements For Senior Silicon Low Power Development Engineer

Linux
  • BS or MS degree in EE/CE or equivalent experience
  • 10+ years of experience in silicon and system power savings features
  • Experience in analyzing Data Center, Client, or Automotive use cases
  • Functional and Power HW validation experience
  • Effective in a collaborative environment

Benefits For Senior Silicon Low Power Development Engineer

Medical Insurance
Equity
  • Competitive salary
  • Equity
  • Comprehensive benefits package

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