Senior Verification Engineer, Memory Subsystem
Description For Senior Verification Engineer, Memory Subsystem
NVIDIA, the world leader in accelerated computing, is seeking a Senior Verification Engineer for their Memory Subsystem team. This role is crucial in ensuring the reliability and performance of NVIDIA's GPU architecture, which powers everything from gaming to AI applications. The position involves working with cutting-edge technology in GPU memory subsystems, requiring expertise in verification methodologies and hardware description languages.
The ideal candidate will be responsible for verifying complex ASIC designs and architectures, developing comprehensive test plans, and ensuring the robustness of GPU memory subsystems. This role offers the opportunity to work with advanced verification methodologies and contribute to technology that's transforming industries through AI and accelerated computing.
At NVIDIA, you'll be part of a diverse and supportive environment that values innovation and continuous learning. The company has revolutionized parallel computing and continues to push boundaries in artificial intelligence and digital twins technology. This role offers the chance to work with some of the brightest minds in the industry while making a lasting impact on world-changing technology.
The position requires strong technical skills in verification methodologies, Verilog, and SystemVerilog, combined with excellent analytical and communication abilities. You'll be collaborating with cross-functional teams including architects, designers, and verification specialists, making this an excellent opportunity for professional growth and impact.
Responsibilities For Senior Verification Engineer, Memory Subsystem
- Verify ASIC design, architecture and micro-architecture using advanced verification methodologies
- Understand design and implementation, define verification scope, develop verification infrastructure
- Create test plans, tests and verification infrastructure for complex IPs/sub-systems
- Perform performance and deadlock verification of GPU memory subsystem unit
- Build reusable bus functional models, monitors, checkers and scoreboards
- Perform functional coverage driven verification closure
- Collaborate with architects, designers, and pre/post silicon verification teams
Requirements For Senior Verification Engineer, Memory Subsystem
- B.Tech./M.Tech. with 4+ years of relevant experience
- Experience in verification of complex IPs/units and sub-systems
- Experience with random stimulus, functional coverage and assertion-based verification methodologies
- Expertise in Verilog
- Knowledge in SystemVerilog or similar HVL
- Familiarity with UVM/VMM verification methodologies
- Experience with industry standard verification tools
- Good debugging and analytical skills
- Scripting knowledge (Python/Perl/shell)
- Good communication skills
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