2025 Summer Intern-DFT Engineer

Qualcomm is a global technology leader in mobile innovation and semiconductor manufacturing, specializing in wireless technologies and AI solutions.
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Description For 2025 Summer Intern-DFT Engineer

Qualcomm China is seeking a DFT Engineering Intern for Summer 2025 to join their innovative semiconductor design team. This role offers an exceptional opportunity to work with cutting-edge technology in digital design and verification.

The position involves hands-on experience with synthesis, DFT logic insertion, and ATPG pattern generation. You'll be working on physical design tasks from verilog netlist to GDS, handling chip/block floorplan, and PD implementation. This includes critical aspects like placement, CTS, PCTS, routing, timing analysis, SI analysis, and IR-drop analysis.

As an intern, you'll be exposed to industry-standard tools and practices, working alongside experienced engineers in timing fix and signoff processes using Primetime, as well as completing various checks including DRC/ERC/PERC/LVS. This role is perfect for students with a strong foundation in VLSI and implementation flow, and those who are passionate about digital back-end design.

Qualcomm offers a comprehensive learning environment with access to mentorship, continuous learning programs, and hands-on experience with advanced semiconductor technologies. The company provides excellent benefits including health coverage, educational support, and wellbeing programs. This internship is an ideal stepping stone for those looking to build a career in semiconductor design and verification.

The ideal candidate should be familiar with Linux systems, possess good scripting skills, and demonstrate strong English communication abilities. We're looking for self-starters who can work effectively in teams and show genuine interest in synthesis, DFT, and digital back-end design. Join Qualcomm to be part of a team that's shaping the future of mobile and wireless technology.

Last updated 3 days ago

Responsibilities For 2025 Summer Intern-DFT Engineer

  • Handle synthesis/DFT logic insertion and ATPG pattern generation
  • Handle physical design tasks from verilog netlist to GDS
  • Handle Chip/Block floorplan, PD implementation, including placement, CTS, PCTS, routing, timing analysis, SI analysis and IR-drop analysis
  • Timing fix and signoff with timing check tool Primetime
  • Finish DRC/ERC/PERC/LVS checks

Requirements For 2025 Summer Intern-DFT Engineer

Linux
  • Familiar with VLSI and implementation flow
  • Familiar with Linux system environment, has script skill
  • Good writing and speaking in English
  • Be interested in synthesis, DFT, digital back-end design
  • Self-Starter with good communication skills and team-working spirit

Benefits For 2025 Summer Intern-DFT Engineer

Medical Insurance
Dental Insurance
Vision Insurance
Mental Health Assistance
Education Budget
  • Health Benefits
  • Financial Benefits
  • Mental Health Support
  • Wellbeing Programs
  • Continuous Learning Programs
  • Tuition Reimbursement
  • Mentorship Programs

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