ASIC Design Engineer, Low Power AI Subsystems
Description For ASIC Design Engineer, Low Power AI Subsystems
Qualcomm Technologies is seeking an ASIC Design Engineer to join their team working on cutting-edge low power AI subsystems. This role focuses on designing ultra-low power solutions for audio and context-aware applications within their Audio products division. The position involves working on a chip-within-a-chip hardware block that incorporates multiple always-on IPs, requiring innovative solutions to complex power domain challenges.
The role offers an opportunity to work on groundbreaking technology that pushes the boundaries of features and performance in audio and AI applications. You'll be part of a team developing premium wireless connectivity solutions with high levels of integration, immersive sound quality, and on-device AI capabilities.
As an ASIC Design Engineer, you'll be responsible for designing high-speed, low-power digital hardware solutions, contributing to architecture definitions, and collaborating with verification teams. The position requires expertise in ASIC/VLSI concepts, RTL design, and familiarity with industry-standard design tools.
This is an excellent opportunity for someone who thrives on continuous learning and wants to make a significant impact in the field of low-power AI systems. The role offers exposure to cutting-edge technology in audio processing, AI, and ultra-low power design, making it an ideal position for engineers looking to advance their careers in hardware design for AI applications.
The position comes with the backing of Qualcomm's industry-leading expertise and resources, offering the chance to work with global teams and contribute to products that will shape the future of AI and audio technology. Whether you're an experienced engineer or a promising talent with relevant experience, this role provides a platform to innovate and grow while working on meaningful projects that push the boundaries of what's possible in low-power AI systems.
Responsibilities For ASIC Design Engineer, Low Power AI Subsystems
- Design high speed, low power digital hardware solutions
- Contribute to definition, micro-architecture and documentation
- Collaborate with Verification team to test, debug and close coverage on the design
- Evaluate synthesis results to verify design meets speed, power and area targets
- Support internal hardware integration, SW teams around the world
- Resolve architecture, design, or verification problems
- Use various design tools to check and improve design quality
- Provide ideas and further innovation of ASICs, IP cores, and process flows
Requirements For ASIC Design Engineer, Low Power AI Subsystems
- Professional or academic ASIC hardware design and/or implementation experience
- Proficiency with Verilog/VHDL RTL design languages
- Good understanding of ASIC/VLSI concepts
- Experience in logic synthesis using Synopsis and/or Cadence tools
- 2+ years of ASIC hardware design related experience preferred
- Working knowledge of UPF specification preferred
- Experience with power analysis, power modeling and low power RTL design preferred
- Scripting skills (Python, PERL, TCL or C) preferred
- Knowledge of bus interface protocols preferred
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