ASIC Design Verification Staff Engineer

Qualcomm WLAN HW team develops and delivers best-in-class WLAN/WiFi solutions setting benchmarks in the wireless industry.
$153,200 - $229,800
Backend
Staff Software Engineer
In-Person
4+ years of experience
AI

Description For ASIC Design Verification Staff Engineer

Qualcomm Atheros, Inc. is seeking a Staff-level ASIC Design Verification Engineer to join their WLAN HW team, which is responsible for developing and delivering industry-leading WLAN/WiFi solutions. In this role, you will be integral to verifying the PHY Sub-System and ensuring the highest quality deliverables.

The position requires a deep understanding of WLAN PHY TX and RX design paths, along with the ability to verify complex algorithms controlling various aspects of wireless systems. You'll be responsible for developing comprehensive test plans for WiFi Standards verification, creating test sequences, and validating design components.

Key responsibilities include owning end-to-end DV tasks, from coding test benches and creating test cases to crafting assertions and achieving all coverage goals. You'll also explore and implement innovative DV methodologies across formal, simulation, and emulation strategies to enhance test bench quality and efficiency.

The ideal candidate will possess strong SystemVerilog/UVM-based verification skills, exceptional debugging and analytical capabilities, and experience with formal/static verification methodologies. A solid understanding of WiFi or other wireless communications standards is highly valued, along with experience in GLS and scripting languages like Perl and Python.

Qualcomm offers a comprehensive benefits package including world-class health coverage, financial planning programs, emotional/mental support resources, and wellbeing programs. Career development is supported through continuous learning programs, tuition reimbursement, and mentorship opportunities.

The compensation range for this position is $153,200 - $229,800, complemented by a competitive annual discretionary bonus program and RSU grants. Join a collaborative environment where you'll work with worldwide design, silicon, and architecture teams to achieve project goals and contribute to cutting-edge wireless technology development.

This role requires a Bachelor's degree in Science, Engineering, or related field with 4+ years of relevant experience, or equivalent combinations of education and experience. The position is based in the San Francisco Bay Area and offers the opportunity to work with some of the industry's leading engineering and technology experts.

Last updated 2 days ago

Responsibilities For ASIC Design Verification Staff Engineer

  • Understanding of WLAN PHY TX and RX design paths
  • Verifying algorithms that control wireless systems
  • Develop test plans to verify WiFi Standards
  • Own end-to-end DV tasks from coding Test benches to achieving coverage goals
  • Explore innovative DV methodologies
  • Collaborate with worldwide design, silicon, and architecture teams

Requirements For ASIC Design Verification Staff Engineer

Python
  • Strong SystemVerilog / UVM based verification skills
  • Strong debugging, Analytical and problem-solving skills
  • Experience in formal / static verification methodologies
  • Good understanding of WiFi or wireless communications standards
  • Experience with GLS, and scripting languages such as Perl, Python
  • Bachelor's degree in Science, Engineering, or related field with 4+ years experience

Benefits For ASIC Design Verification Staff Engineer

Medical Insurance
Dental Insurance
Vision Insurance
401k
Education Budget
Mental Health Assistance
  • World-class health coverage
  • Financial planning programs
  • Emotional/mental support resources
  • Wellbeing programs
  • Continuous learning and development programs
  • Tuition reimbursement
  • Mentorship opportunities

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