ASIC RTL Design - (Turing/AI ML) Sr Eng/Sr Lead/Staff Engineer

A leading technology company specializing in semiconductor and telecommunications equipment.
Backend
Staff Software Engineer
In-Person
4+ years of experience
AI

Description For ASIC RTL Design - (Turing/AI ML) Sr Eng/Sr Lead/Staff Engineer

Qualcomm India Private Limited is seeking a talented ASIC RTL Design Engineer to join their team working on cutting-edge AI/ML systems. This role offers an exciting opportunity to work at the intersection of hardware design and artificial intelligence, focusing on developing sophisticated RTL implementations for Turing/AI ML systems.

The position involves close collaboration with product definition and architecture teams to develop implementation strategies that meet critical Performance, Power, Area, and Schedule (PPAS) goals. You'll be responsible for defining various aspects of block-level design, including interfaces, clocking, transaction flow, and pipeline optimization, while maintaining a strong focus on power efficiency.

As a senior member of the team, you'll lead RTL coding efforts for subsystem/SOC integration, oversee function/performance simulation debugging, and drive quality assurance through Lint/CDC/FV/UPF checks. The role requires expertise in developing assertions for white-box testing coverage and working closely with stakeholders to ensure optimal collateral quality.

The ideal candidate should possess strong knowledge of low-power microarchitecture techniques, AI/ML systems, and computer system architecture. Experience with Verilog/System Verilog, simulation tools, and a deep understanding of NoC Design are essential. You'll be working in a collaborative environment that values innovation and technical excellence, with opportunities to contribute to groundbreaking developments in AI hardware design.

Qualcomm offers comprehensive benefits including world-class health coverage, financial planning support, wellbeing programs, and continuous learning opportunities. Join us to be part of a team that's pushing the boundaries of what's possible in AI and hardware design, while working alongside some of the industry's leading experts in a supportive and inclusive culture.

Last updated 20 hours ago

Responsibilities For ASIC RTL Design - (Turing/AI ML) Sr Eng/Sr Lead/Staff Engineer

  • Interact closely with product definition and architecture team
  • Develop implementation strategies for subsystem PPAS goals
  • Define block level design aspects including interfaces and clocking
  • Lead RTL coding team for subsystem/SOC integration
  • Drive Lint/CDC/FV/UPF checks for design quality
  • Develop Assertions for white-box testing-coverage
  • Work with stakeholders on collateral quality
  • Deliver key design collaterals

Requirements For ASIC RTL Design - (Turing/AI ML) Sr Eng/Sr Lead/Staff Engineer

Linux
  • Understanding of low power microarchitecture techniques and AI/ML systems
  • Knowledge of Computer system architecture
  • Experience in high performance design techniques
  • Understanding of NoC Design
  • Knowledge of Verilog / System Verilog
  • Experience with simulators and waveform debugging tools
  • Bachelor's or Master's degree in Electronics/Electrical Engineering
  • 4+ years of experience working on multiple designs

Benefits For ASIC RTL Design - (Turing/AI ML) Sr Eng/Sr Lead/Staff Engineer

Medical Insurance
Dental Insurance
Vision Insurance
Mental Health Assistance
Education Budget
  • World-class health coverage for employees and dependents
  • Financial planning and future security programs
  • Emotional/mental strength and resilience support
  • Wellbeing programs and resources
  • Continuous learning and development programs
  • Tuition reimbursement
  • Mentorship opportunities

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