ASIC Timing Engineer, Staff

Leading semiconductor company specializing in wireless technology and innovation.
$140,000 - $210,000
Backend
Staff Software Engineer
In-Person
5,000+ Employees
4+ years of experience
AI · Automotive

Description For ASIC Timing Engineer, Staff

Qualcomm Technologies, Inc. is seeking a Staff-level ASIC Timing Engineer to join their team in San Diego. This role is crucial for developing timing analysis solutions for Mobile, Compute, Automotive, and IOT markets. The position involves working with cutting-edge technologies in 5nm, 4nm, and beyond process nodes.

The ideal candidate will collaborate with physical design teams, CAD teams, and IP teams to ensure successful timing closure and validation. You'll be responsible for conducting Spice simulations, performing PVT corners validation, and maintaining STA vs spice correlation. The role requires expertise in timing analysis tools like PT-SI and Tempus, along with strong programming skills in Python, Perl, TCL, and C++.

This is an excellent opportunity for an experienced engineer looking to work with advanced process technologies and contribute to innovative SOC products. The position offers competitive compensation ranging from $140,000 to $210,000 annually, plus additional benefits including annual bonuses and RSU grants.

At Qualcomm, you'll be part of a team that values diversity and inclusion, providing opportunities for professional growth and development. The company offers comprehensive benefits including medical, dental, and vision insurance, 401k plans, and educational support. You'll work in an environment that encourages innovation and provides access to cutting-edge technology and resources.

The role requires at least 4 years of relevant experience in ASIC design and timing analysis, with a strong understanding of digital design flows and timing closure methodologies. Your work will directly impact the company's success in developing next-generation wireless and computing solutions.

Last updated 5 days ago

Responsibilities For ASIC Timing Engineer, Staff

  • Perform timing analysis for Mobile, Compute, Automotive and IOT markets
  • Work with physical design team on timing closure
  • Validate PVT corners and STA vs spice correlation
  • Drive STA methodology using PT-SI, Tempus and timing ECO tools
  • Support timing sign off for complex SOCs
  • Improve timing convergence process across the company

Requirements For ASIC Timing Engineer, Staff

Python
Java
  • Bachelor's degree in Science, Engineering, or related field and 4+ years of ASIC design experience
  • Experience with Spice simulations (Hspice/Finesim/AFS/Spectre/Infinisim)
  • Knowledge of timing analysis and STA methodology
  • Understanding of RTL to GDS digital flow
  • Programming skills in Python, Perl, TCL, Unix shell, C/C++
  • Experience with timing closure and physical design

Benefits For ASIC Timing Engineer, Staff

Medical Insurance
401k
Vision Insurance
Dental Insurance
  • Competitive annual discretionary bonus program
  • Annual RSU grants
  • Comprehensive health coverage
  • Financial planning support
  • Educational support

Interested in this job?

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