CPU DFT - Sr Engineer

Leading technology innovator that pushes boundaries to enable next-generation experiences and drives digital transformation.
$142,200 - $213,400
Embedded
Senior Software Engineer
In-Person
5,000+ Employees
3+ years of experience
Enterprise SaaS

Description For CPU DFT - Sr Engineer

Qualcomm Technologies, Inc. is seeking a Senior DFT Engineer to join their CPU Engineering team in Santa Clara. This role offers an exciting opportunity to work on ground-up implementation of new chip architecture, collaborating with chip architects, designers, and test engineers. The position focuses on verifying DFT and DFD architecture, implementation, and test plans for mixed signal and digital VLSI designs.

The ideal candidate will bring strong expertise in digital ASIC design, DFT techniques, and test generation tools. You'll be responsible for creating and validating test vectors, ensuring DFT requirements are met, and working closely with designers to enhance test coverage and debug capabilities. The role requires both technical depth in hardware engineering and the ability to work collaboratively across teams.

Qualcomm offers a comprehensive compensation package including a competitive base salary range of $142,200 - $213,400, annual bonuses, RSU grants, and extensive benefits covering health, wealth, and wellbeing. The company provides a supportive, inclusive culture focused on innovation and professional growth, with access to continuous learning opportunities, tuition reimbursement, and mentorship programs.

This is an excellent opportunity for an experienced engineer looking to make significant contributions to next-generation technology while working with industry-leading experts. The position offers the chance to influence new design architecture while being part of a company that's driving digital transformation and creating a smarter, connected future.

Last updated 2 days ago

Responsibilities For CPU DFT - Sr Engineer

  • Create test vectors or oversee their creation
  • Validate DFT requirements are being met
  • Work with designers to increase test coverage, debug observability and flexibility
  • Verify post-PD designs meet DFT requirements
  • Work with test personnel, stepping in to do run tests when needed

Requirements For CPU DFT - Sr Engineer

Linux
  • BA/BS degree in Electrical/Computer Engineering with 3+ years of practical experience
  • Strong fundamentals in digital ASIC design; experience using Verilog or VHDL
  • Experience with ASIC test, DFT, and debug
  • 3+ years of practical experience with test or DFT
  • Experience using the Mentor Tessent tools
  • Experience with defining and implementing SOC level verification on large designs
  • Experience in TCL, Perl/Python and Shell scripting

Benefits For CPU DFT - Sr Engineer

Medical Insurance
Dental Insurance
Vision Insurance
Mental Health Assistance
401k
Education Budget
  • Competitive annual discretionary bonus program
  • Annual RSU grants
  • Health benefits coverage for employees and eligible dependents
  • Financial planning programs
  • Emotional/mental health support
  • Wellbeing programs
  • Tuition reimbursement
  • Mentorship programs

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