CPU Physical Design Timing Engineer

Join Qualcomm Technologies, Inc. through their NUVIA division in a transformative role as a CPU Physical Design Timing Engineer. This position offers an exceptional opportunity to work on cutting-edge technology, specifically focusing on the Oryon CPU Cores. You'll be part of a team reimagining silicon and creating computing platforms that are set to transform the industry.

In this role, you'll collaborate with some of the most talented engineers in the world, working on industry-leading technology nodes N2/N3. Your primary responsibilities will include defining, developing, and driving CPU timing closure, working closely with microarchitecture and RTL design teams to implement designs that meet aggressive power, area, and performance goals.

The position offers significant professional growth opportunities, working with state-of-the-art tools and methodologies. You'll be responsible for STA setup, convergence, and signoff for multi-mode designs, conducting timing analysis across multiple PVT conditions, and developing automation scripts for methodology enhancement. The role requires expertise in STA timing analysis, experience with tools like Prime-time and Tempus, and strong programming skills in TCL, Perl, and Python.

Qualcomm offers a comprehensive benefits package, including competitive base salary ($139,000-$208,000), annual bonuses, RSU grants, and extensive health benefits. The company promotes a culture of continuous learning with tuition reimbursement and development programs. This is an ideal opportunity for experienced engineers looking to make a significant impact in CPU design while working with cutting-edge technology at a global leader in semiconductor innovation.