DSP / NPU Design Verification Sr lead Engineer

One of the largest fabless semiconductor design companies generating over $35 Billion in annual revenues from chipsets and IP royalties.
$120,000 - $200,000
Embedded
Senior Software Engineer
In-Person
5,000+ Employees
5+ years of experience
AI · Automotive

Description For DSP / NPU Design Verification Sr lead Engineer

Qualcomm, a global leader in semiconductor design with $35B annual revenue, is seeking a Senior DSP/NPU Design Verification Engineer in Bangalore. This role is crucial for delivering high-performance DSP/NPU cores powering Qualcomm's multi-tier SoC roadmap for mobile, AI, and automotive applications. The position requires 5-8 years of experience in design verification of complex processor architectures. You'll work with a global team on cutting-edge technology, using advanced verification techniques and tools. The role combines technical expertise in System Verilog/UVM with opportunities for professional growth through mentorship and continuous learning programs. Qualcomm offers comprehensive benefits including health coverage, financial planning, and wellbeing programs. This is an opportunity to join a company at the forefront of semiconductor innovation, working on technology that impacts billions of devices worldwide. The position offers exposure to various domains including AI and automotive, making it an excellent opportunity for career growth in the semiconductor industry.

Last updated 40 minutes ago

Responsibilities For DSP / NPU Design Verification Sr lead Engineer

  • Drive design verification of DSP IP by working with global DSP design team
  • Implement and improve System Verilog/UVM Testbench Architecture
  • Develop and deploy new verification methodologies and automation
  • Develop design test plans and verification environments
  • Debug IP level, Subsystem and SoC level fails and bugs
  • Perform gate level simulation and verification
  • Handle power aware RTL verification

Requirements For DSP / NPU Design Verification Sr lead Engineer

Python
Linux
  • 5-8 years experience in processor/ASIC design verification
  • Solid background in Digital Design, Processor Architecture and Power aware verification
  • Expertise in System Verilog Testbench Architecture
  • Experience in writing C based and assembly level testcases
  • Experience with System Verilog/UVM and simulators
  • Scripting skills in Perl, Python, Shell
  • Strong analytical and debugging skills
  • Bachelor's/Master's degree in Computer Science, Electrical/Electronics Engineering or related field
  • Excellent interpersonal and communication skills

Benefits For DSP / NPU Design Verification Sr lead Engineer

Medical Insurance
Dental Insurance
Vision Insurance
Mental Health Assistance
Education Budget
  • World-class health coverage for employees and dependents
  • Financial planning and future security programs
  • Mental health and emotional support resources
  • Comprehensive wellbeing programs
  • Tuition reimbursement
  • Mentorship programs
  • Continuous learning and development programs

Interested in this job?

Jobs Related To Qualcomm DSP / NPU Design Verification Sr lead Engineer

Senior Sensors Software Engineer

Senior Sensors Software Engineer position at Qualcomm developing embedded software solutions for mobile, IoT, and wearable applications.

Senior Embedded Software Engineer (C/C++), Machine Learning

Senior Embedded Software Engineer position at Qualcomm focusing on AI model optimization and deployment for low-power systems using C/C++.

Lead Engineer, Senior - Linux Driver Development (Display)

Senior Linux Driver Development role at Qualcomm focusing on Display technologies and embedded systems.

CPU Post-Silicon Validation Engineer - Multiple Levels

Senior CPU Post-Silicon Validation Engineer role at Qualcomm, focusing on CPU silicon bring-up and validation across multiple locations.

CPU Core Validation Engineer

Senior CPU Core Validation Engineer position at Qualcomm India, focusing on CPU architecture validation and requiring 5+ years of experience in Silicon validation and embedded systems.