DSP / NPU Design Verification Sr Lead Engineer
Description For DSP / NPU Design Verification Sr Lead Engineer
Qualcomm is seeking a Senior Lead Engineer for DSP/NPU Design Verification to join their team in Bangalore. This role is crucial in delivering high-performance DSP/NPU cores that power Qualcomm's multi-tier SoC roadmap for mobile, AI, and automotive applications. The position requires 3-8 years of experience in design verification of complex proprietary DSP/NPU IP.
The role involves working with a global DSP design team on architecture, implementation, power, post-silicon, and back-end activities. You'll be responsible for implementing System Verilog/UVM Testbench Architecture, developing verification methodologies, and ensuring high-quality commercial success of products. Daily tasks include working with assertions, simulation, formal verification, HW-SW co-verification, and emulation tools.
Qualcomm offers a comprehensive benefits package including world-class health coverage, financial planning programs, mental health support, and continuous learning opportunities. The company fosters a supportive, inclusive culture where innovative ideas are valued and contribute to world-changing technologies.
As a leader in semiconductor design, Qualcomm provides an environment where you'll work alongside top engineering experts, helping you grow professionally while solving complex technological challenges. The company's success in mobile, AI, and automotive sectors offers exciting opportunities to work on cutting-edge technologies that impact lives globally.
Responsibilities For DSP / NPU Design Verification Sr Lead Engineer
- Drive design verification of DSP IP by working with a global DSP design team
- Implement and improve System Verilog/UVM Testbench Architecture
- Develop and deploy new verification methodologies
- Develop design corresponding test plans
- Debug IP level, Subsystem and SoC level fails and bugs
- Complete all required verification activities at IP level
- Responsible for gate level simulation bring-up
- Responsible for power aware RTL verification
Requirements For DSP / NPU Design Verification Sr Lead Engineer
- Bachelor's degree in Computer Science, Electrical/Electronics Engineering or related field
- 3-8 years experience in processor/ASIC design verification
- Solid background in Digital Design, Processor Architecture
- Expertise in System Verilog Testbench Architecture
- Experience in writing C based and assembly level testcases
- Experience in System Verilog/UVM
- Scripting skills in Perl, Python, Shell
- Strong knowledge of digital design
- Excellent inter-personal and communication skills
Benefits For DSP / NPU Design Verification Sr Lead Engineer
- World-class health coverage for employees and dependents
- Financial planning programs
- Emotional/mental health support
- Wellbeing programs
- Tuition reimbursement
- Mentorship programs
- Continuous learning and development programs
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