Engineer/ Senior Engineer - DDR Memory Validation and Firmware development
Description For Engineer/ Senior Engineer - DDR Memory Validation and Firmware development
Qualcomm, a leading global semiconductor company, is seeking an Engineer/Senior Engineer specializing in DDR Memory Validation and Firmware development in Bangalore, India. This role combines hardware and software expertise, focusing on high-speed memory interfaces and system optimization.
The position involves leading critical initiatives in memory subsystem validation and firmware development for advanced SoCs. You'll be responsible for optimizing memory interface performance across various DRAM types, conducting comprehensive validation testing, and developing low-level firmware using C/C++. The role requires close collaboration with pre-silicon design teams, customers, and application engineers to ensure product excellence.
This is an excellent opportunity for engineers with 2-5 years of experience who have a strong foundation in memory protocols, particularly DDR, and firmware development. The ideal candidate will possess both technical expertise and strong communication skills, enabling effective collaboration across teams.
The role offers exposure to cutting-edge technology in the semiconductor industry, working with advanced SoCs and memory systems. You'll be part of a team that ensures the reliability and performance of Qualcomm's innovative products, making a direct impact on next-generation mobile and wireless technologies.
Working at Qualcomm means joining a global leader in wireless technology, with opportunities for professional growth and the chance to work on technologies that power billions of devices worldwide. The position combines hands-on technical work with strategic thinking, making it ideal for engineers looking to advance their careers in hardware-software integration.
Responsibilities For Engineer/ Senior Engineer - DDR Memory Validation and Firmware development
- Lead bring-up and debugging of high-speed memory interfaces(LPDDR) on advanced SoCs
- Optimize memory interface timings and configurations across multiple DRAM types
- Conduct comprehensive validation, IO tuning, and PVT testing
- Work with pre-silicon design teams for feature integration
- Interface with Design/Software teams for debugging
- Work with Customers & Application Engineers for requirements gathering
- Develop and validate low-level firmware for memory subsystems
- Validate new product features
- Identify and resolve complex memory subsystem issues
Requirements For Engineer/ Senior Engineer - DDR Memory Validation and Firmware development
- Bachelor's/Master's degree in Electrical/Electronics/Computer Science Engineering
- 2-5 years of experience in related domain
- Good communication, English speaking/writing and team work skills
- Logical thinking and problem-solving ability
- Strong C/C++ Skills, Python or Perl skills
- In-depth understanding of memory protocols such as DDR
- Understanding of IP architecture
- Familiarity with lab equipment and PCB layout
- Knowledge of high-speed board design and signal integrity principles
