Engineer/Sr Engineer (DDR Memory Validation and Firmware development)

Leading technology innovator that pushes boundaries to enable next-generation experiences and drives digital transformation.
Embedded
Mid-Level Software Engineer
In-Person
2+ years of experience
Enterprise SaaS

Description For Engineer/Sr Engineer (DDR Memory Validation and Firmware development)

Qualcomm, a leading technology innovator, is seeking an Engineer/Sr Engineer specializing in DDR Memory Validation and Firmware development. This role combines hardware expertise with firmware development, focusing on high-speed memory interfaces and system validation. The position offers an opportunity to work with cutting-edge technology in memory subsystems, requiring both technical depth and cross-functional collaboration.

The ideal candidate will lead critical initiatives in memory interface optimization, validation, and firmware development. You'll be responsible for ensuring the performance and reliability of memory subsystems across various DRAM types and vendors. The role demands strong technical skills in C/C++ programming, understanding of DDR protocols, and hands-on experience with laboratory equipment.

Working at Qualcomm means joining a team that pushes the boundaries of what's possible in technology. The company offers comprehensive benefits including world-class health coverage, financial planning support, and continuous learning opportunities. You'll collaborate with industry experts and contribute to innovations that impact global technology advancement.

The position offers significant growth potential through mentorship, tuition reimbursement, and exposure to cutting-edge technology development. Qualcomm's supportive, inclusive culture encourages innovation and professional development, making it an ideal environment for engineers looking to make a meaningful impact in technology advancement.

Last updated a day ago

Responsibilities For Engineer/Sr Engineer (DDR Memory Validation and Firmware development)

  • Lead bring-up and debugging of high-speed memory interfaces(LPDDR) on advanced SoCs
  • Optimize memory interface timings and configurations across multiple DRAM types
  • Conduct comprehensive validation, IO tuning, and PVT testing
  • Work with pre-silicon design teams for feature integration
  • Interface with Design/Software teams for debugging
  • Develop and validate low-level firmware for memory subsystems using C/C++
  • Work with Customers & Application Engineers to understand requirements
  • Validate new product features and ensure quality compliance

Requirements For Engineer/Sr Engineer (DDR Memory Validation and Firmware development)

Python
Linux
  • Bachelor's degree in Computer Science, Electrical/Electronics Engineering or related field
  • 2-5 years of experience in related domain
  • Good communication, English speaking/writing and team work skills
  • Strong C/C++ skills, Python or Perl skills
  • In-depth understanding of memory protocols such as DDR
  • Experience with lab equipment (oscilloscopes, multimeters, logic analyzers)
  • Understanding of PCB layout, high-speed board design, and signal integrity principles
  • Logical thinking and problem-solving ability

Benefits For Engineer/Sr Engineer (DDR Memory Validation and Firmware development)

Medical Insurance
Education Budget
Mental Health Assistance
  • World-class health coverage for employees and dependents
  • Financial planning and future security programs
  • Emotional/mental strength and resilience support
  • Wellbeing programs and resources
  • Continuous learning and development programs
  • Tuition reimbursement
  • Mentorship opportunities

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