Functional DV ( Clock/Power) Verification Sr Engineer
Description For Functional DV ( Clock/Power) Verification Sr Engineer
Qualcomm, a leader in mobile computing technology, is seeking a Senior Functional DV Engineer to join their Graphics Hardware team in Bangalore. This role focuses on verifying Clock and power management modules, crucial for maintaining power efficiency in GPU solutions. The position requires expertise in System Verilog/UVM verification, low power design techniques, and strong debugging skills.
The ideal candidate will work with cutting-edge GPU technology, collaborating with global teams across design, silicon, and architecture divisions. They will be responsible for end-to-end verification tasks, from test bench coding to coverage analysis, ensuring robust power management solutions.
This role offers an opportunity to work with industry experts and contribute to world-changing innovations. Qualcomm provides comprehensive benefits including health coverage, financial planning support, and continuous learning opportunities. The company fosters an inclusive culture that values diverse expertise and promotes professional growth through mentorship and development programs.
The position requires 3-5 years of relevant experience and strong communication skills for effective collaboration with worldwide teams. Join Qualcomm to be part of a team setting benchmarks in mobile computing while developing your career in hardware verification.
Responsibilities For Functional DV ( Clock/Power) Verification Sr Engineer
- Verifying Clock and power management module with design features for low power
- Understanding of GPU power and clock domains with power-up/down sequences
- Own end to end DV tasks from coding Test bench and test cases
- Write assertions, debugging simulations and achieving coverage goals
- Develop test plan to verify sequences for Clock and power management modules
- Collaborate with worldwide design, silicon and architecture teams
Requirements For Functional DV ( Clock/Power) Verification Sr Engineer
- Bachelor's/Master's degree in Computer Science, Electrical/Electronics Engineering or related field
- 3-5 years of design verification experience
- Strong System Verilog/UVM based verification skills
- Experience with assertion & coverage-based verification methodology
- Basic understanding of low power design techniques
- Good understanding of design components like clock gates, level shifters
- Strong communication skills
Benefits For Functional DV ( Clock/Power) Verification Sr Engineer
- World-class health coverage for employees and dependents
- Financial planning programs
- Emotional/mental health support
- Wellbeing programs
- Tuition reimbursement
- Mentorship programs
- Continuous learning and development programs
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