Functional DV ( Clock/Power) Verification Staff Engineer

A leading technology company developing GPU solutions and setting power and performance benchmarks in mobile computing industry.
Hardware
Staff Software Engineer
In-Person
8+ years of experience
AI

Description For Functional DV ( Clock/Power) Verification Staff Engineer

Qualcomm is seeking a Staff-level Hardware Verification Engineer to join their Graphics Hardware team. This role focuses on verifying Clock and Power management modules with design features for low power implementation.

The position offers an exciting opportunity to work with cutting-edge GPU technology that sets industry benchmarks in mobile computing. As a Staff Engineer, you'll be responsible for end-to-end verification tasks, from test bench coding to achieving coverage goals, while working with advanced power management features.

Key responsibilities include understanding GPU power and clock domains, developing comprehensive test plans, and implementing innovative verification methodologies. You'll collaborate with global teams across design, silicon, and architecture domains, making strong communication skills essential.

The ideal candidate brings 8-13 years of design verification experience, with deep expertise in System Verilog/UVM and low-power design techniques. Knowledge of tools like Synopsys NLP and scripting languages (Python/Perl) is valuable.

Qualcomm offers an exceptional work environment with comprehensive benefits, including world-class health coverage, financial planning support, and continuous learning opportunities. You'll be part of a team driving innovation in mobile computing, with access to mentorship and professional development programs.

This role provides an excellent opportunity to work on challenging technical problems while advancing your career at a global technology leader. Join Qualcomm to contribute to groundbreaking GPU technology while working alongside industry experts in hardware verification.

Last updated 3 days ago

Responsibilities For Functional DV ( Clock/Power) Verification Staff Engineer

  • Understanding of GPU power and clock domains with power-up/down sequences
  • Own end to end DV tasks from coding Test bench and test cases, write assertions, debugging simulations and achieving all coverage goals
  • Develop test plan to verify sequences and design components for Clock and power management modules
  • Explore innovative DV methodologies (formal and simulation) to continuously push the quality and efficiency of test benches
  • Collaborate with worldwide design, silicon and architecture teams

Requirements For Functional DV ( Clock/Power) Verification Staff Engineer

Python
  • Bachelor's/Master's/PhD in Computer Science, Electrical/Electronics Engineering or related field
  • 8-13 years of design verification experience
  • Strong System Verilog/UVM based verification skills
  • Experience with assertion & coverage-based verification methodology
  • Basic understanding of low power design techniques
  • Good understanding of design components such as clock gates, level shifters, isolation cells and state retention cells
  • Experience with Synopsys NLP tool
  • Experience with scripting languages such as Perl, Python

Benefits For Functional DV ( Clock/Power) Verification Staff Engineer

Medical Insurance
Dental Insurance
Vision Insurance
Mental Health Assistance
Education Budget
  • World-class health coverage for employees and dependents
  • Financial planning and future security programs
  • Emotional/mental strength and resilience support
  • Wellbeing programs and resources
  • Continuous learning and development programs
  • Tuition reimbursement
  • Mentorship opportunities

Interested in this job?

Jobs Related To Qualcomm Functional DV ( Clock/Power) Verification Staff Engineer

Sr Lead Engineer - DFT

Senior Lead Engineer position at Qualcomm focusing on Design for Test (DFT) implementation and validation.

CPU STA/Timing Engineer - Staff/Sr. Staff

Senior-level CPU STA/Timing Engineering role at Qualcomm focusing on timing analysis and optimization for complex SOC designs.

CPU Micro-architect/RTL Designer -Sr Staff

Senior Staff CPU Micro-architect/RTL Designer position at Qualcomm, focusing on high-performance CPU design and implementation with emphasis on architectural innovation.

WLAN Subsystem Design Lead (Staff Eng)

Lead WLAN Subsystem Design role at Qualcomm focusing on next-gen Wifi technologies and ASIC development.

Sr Lead Engineer - DFT

Senior Lead DFT Engineer position at Qualcomm India, focusing on hardware design, testing, and team leadership with comprehensive benefits and growth opportunities.