Infra IP DV - SMMU IP Sr lead Engineer

Backend
Senior Software Engineer
In-Person
2+ years of experience
AI · Enterprise SaaS

Description For Infra IP DV - SMMU IP Sr lead Engineer

Qualcomm India Private Limited is seeking an Infra IP DV - SMMU IP Sr lead Engineer for their next generation System-on-chip (SoC) for smartphones, tablets, and other product categories. The role involves ownership of the System Memory Management [SMMU] IP test bench and collaterals.

Key responsibilities include:

  • Ownership of DV test bench and associated collaterals (Checkers, Trackers, Scoreboards, Assertion, Functional Coverage)
  • Developing test plans and test cases to cover design feature sets
  • Collaborating with System Architects, Design, and emulation teams on failure debugs and coverage closure
  • Debugging regression signatures and identifying bug fixes
  • Developing and deploying scripts/tools for validation
  • Debugging post-silicon issues with Design, SW, and test teams
  • Working with SoC level performance modeling team on latency and bandwidth analysis

Required skills:

  • Strong debugging, analytical, and problem-solving skills
  • Expertise in UVM and System Verilog coding
  • Knowledge of ARM bus protocols, Virtual Memory concepts, and SoC system architecture
  • Experience in developing Monitors, Scoreboards, and Sequencers
  • Communication and collaboration skills

Desired skills:

  • Experience in designs optimized for low power
  • Proficiency in scripting languages (Python or Perl)
  • Post-silicon bring-up and HW-SW debug experience

This role offers the opportunity to work on cutting-edge technology in a collaborative environment, contributing to world-changing innovations and breakthrough technologies. Qualcomm provides comprehensive benefits, continuous learning and development programs, and the chance to work alongside leading engineering and technology experts in the industry.

Last updated 3 minutes ago

Responsibilities For Infra IP DV - SMMU IP Sr lead Engineer

  • Ownership of DV test bench and associated collaterals
  • Develop test plans and test cases
  • Work with System Architects, Design, and emulation teams on failure debugs and coverage closure
  • Debug regression signatures and identify bug fixes
  • Develop and deploy scripts/tools for validation
  • Debug post-silicon issues with Design, SW, and test teams
  • Work with SoC level performance modeling team on latency and bandwidth analysis

Requirements For Infra IP DV - SMMU IP Sr lead Engineer

Java
Python
  • Strong debugging, analytical, and problem-solving skills
  • Expertise in UVM and System Verilog coding
  • Knowledge of ARM bus protocols, Virtual Memory concepts, and SoC system architecture
  • Experience in developing Monitors, Scoreboards, and Sequencers
  • Communication and collaboration skills
  • Bachelor's degree in Computer Science, Electrical/Electronics Engineering, or related field

Benefits For Infra IP DV - SMMU IP Sr lead Engineer

  • Health coverage
  • Financial planning programs
  • Emotional/mental support resources
  • Wellbeing programs

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