IP SMMU Design Verification Principal Engineer

Leading technology innovator that pushes boundaries to enable next-generation experiences and drives digital transformation for a smarter, connected future.
Backend
Principal Software Engineer
In-Person
8+ years of experience
Enterprise SaaS

Description For IP SMMU Design Verification Principal Engineer

Qualcomm, a leading technology innovator, is seeking a Principal Engineer for IP SMMU Design Verification. This role focuses on System Memory Management Unit development, which handles virtual to physical address translation and memory management for next-generation SoCs. The position requires extensive experience in hardware engineering, particularly in verification and debugging.

The ideal candidate will lead test bench development and validation efforts, working closely with system architects and design teams. They'll be responsible for comprehensive testing, debugging, and ensuring quality across the development lifecycle. This role offers an opportunity to work on cutting-edge technology that powers smartphones, tablets, and other modern devices.

Qualcomm offers an exceptional work environment with opportunities for professional growth through continuous learning, mentorship, and collaboration with industry experts. The company provides comprehensive benefits including health coverage, financial planning support, and wellness programs. This position is perfect for experienced engineers looking to make significant contributions to next-generation technology while working with a global team of experts.

Join Qualcomm to be part of a team that's pushing the boundaries of what's possible in technology, while enjoying excellent career growth opportunities and work-life balance. The company's commitment to innovation and employee development makes it an ideal place for those seeking to advance their careers in hardware engineering.

Last updated 2 hours ago

Responsibilities For IP SMMU Design Verification Principal Engineer

  • Ownership of System Memory Management IP test bench and collaterals
  • Develop test plan and test cases to cover design feature set
  • Work with System Architects, Design, emulation teams on failure debugs
  • Debug regression signatures and identifying bug fixes
  • Developing/Deploying scripts/tools for validation
  • Debug and root cause post silicon issues
  • Work with SoC level performance modeling team on latency, bandwidth analysis

Requirements For IP SMMU Design Verification Principal Engineer

Python
  • Bachelor's degree in Computer Science, Electrical/Electronics Engineering or related field with 8+ years experience
  • Strong debugging, Analytical and problem-solving skills
  • Expertise in UVM, System Verilog coding
  • Knowledge of ARM bus protocols, Virtual Memory concepts, SoC system architecture
  • Experience in developing Monitors, Scoreboards, Sequencers
  • Communication and collaboration skills
  • Post-silicon bring-up and HW-SW debug experience (preferred)
  • Proficiency in Python or Perl (desired)

Benefits For IP SMMU Design Verification Principal Engineer

Medical Insurance
Mental Health Assistance
Education Budget
  • Health benefits
  • Financial planning programs
  • Emotional/mental support resources
  • Tuition reimbursement
  • Mentorship programs

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