LPASS DV Sr Engineer

A leading technology innovator that pushes boundaries to enable next-generation experiences and drives digital transformation for a smarter, connected future.
Hardware
Senior Software Engineer
In-Person
2+ years of experience
AI

Description For LPASS DV Sr Engineer

Qualcomm, a global leader in technology innovation, is seeking a Senior LPASS DV Engineer to join their Hardware team in Bangalore. This role is part of a worldwide team responsible for developing and delivering cutting-edge Audio solutions that set benchmarks in the mobile computing industry. The position requires deep understanding of hardware architecture while working with the latest DV tools and technologies.

The ideal candidate will have 1-6 years of VLSI industry experience and strong expertise in hardware description languages, particularly Verilog and System Verilog. You'll be responsible for DV ownership of features in the Low power audio subsystem, developing robust testbenches, and ensuring bug-free silicon for Tape Out.

At Qualcomm, you'll work alongside leading engineering and technology experts, contributing to world-changing innovations. The company offers comprehensive benefits including world-class health coverage, financial planning support, mental health assistance, and continuous learning opportunities through tuition reimbursement and mentorship programs.

This role offers an exciting opportunity to be part of a team that pushes the boundaries of what's possible in audio technology while working on products that impact millions of users worldwide. You'll have the chance to grow professionally, tackle complex challenges, and contribute to breakthrough technologies in a collaborative, inclusive environment.

Last updated 3 days ago

Responsibilities For LPASS DV Sr Engineer

  • DV ownership of one or more features in the Low power audio subsystem(LPASS) core
  • Developing a robust testbench, optimized for the specific feature/DUT
  • Explore innovative DV methodologies (formal, simulation and emulation based)
  • Ensure bug-free silicon for Tape Out
  • Collaborate with cross-functional teams to develop solutions and meet performance requirements

Requirements For LPASS DV Sr Engineer

Python
  • Bachelor's degree in Computer Science, Electrical/Electronics Engineering, or related field
  • 1-6 years of VLSI industry experience
  • Strong debugging and analytical skills
  • Strong knowledge of HDLs like Verilog, System Verilog
  • Proficiency in developing SV/UVM based test benches
  • Proficient in debugging RTL/TB issues using Verdi or similar tools
  • Proficient with scripting languages such as Perl and Python
  • Knowledge of UPF, low power architecture (preferred)

Benefits For LPASS DV Sr Engineer

Medical Insurance
Mental Health Assistance
Education Budget
  • World-class health coverage for employees and eligible dependents
  • Financial planning and future preparation programs
  • Emotional/mental strength and resilience support
  • Wellbeing programs
  • Continuous learning and development programs
  • Tuition reimbursement
  • Mentorship opportunities

Interested in this job?

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