University Grad- LPASS DV Engineer

Leading technology innovator that develops mobile computing and telecommunications products.
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Entry-Level Software Engineer
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1+ year of experience
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Description For University Grad- LPASS DV Engineer

Qualcomm, a leading technology innovator, is seeking a University Graduate LPASS DV Engineer to join their Hardware team in Bangalore. This role is part of the worldwide team responsible for developing and delivering cutting-edge Audio solutions that set benchmarks in the mobile computing industry. As a LPASS DV Engineer, you'll work on hardware architecture while utilizing the latest DV tools and technologies.

The position involves deep engagement with the Low Power Audio Subsystem (LPASS) core, where you'll be responsible for developing robust testbenches and exploring innovative verification methodologies. You'll work with cross-functional teams to ensure bug-free silicon delivery for Snapdragon-based computing devices.

This is an excellent opportunity for recent graduates with VLSI experience to work with state-of-the-art technology in audio solutions. You'll be using various programming languages and tools including System Verilog, UVM, Verdi, Perl, and Python. The role offers hands-on experience with hardware verification and validation, providing a strong foundation for a career in hardware engineering.

Working at Qualcomm means being part of a team that pushes the boundaries of what's possible in mobile computing and telecommunications. You'll contribute to next-generation experiences and help create a smarter, connected future. The position offers the chance to work with world-class products and collaborate with talented professionals across the globe.

If you're passionate about hardware engineering, have strong analytical skills, and want to work with cutting-edge audio technology, this role provides an excellent launching pad for your career in the semiconductor industry.

Last updated 2 days ago

Responsibilities For University Grad- LPASS DV Engineer

  • DV ownership of one or more features in the Low power audio subsystem(LPASS) core
  • Developing a robust testbench, optimized for the specific feature/DUT
  • Explore innovative DV methodologies (formal, simulation and emulation based)
  • Ensure a bug free silicon for Tape Out

Requirements For University Grad- LPASS DV Engineer

Python
  • 1-6 years of VLSI industry experience
  • Strong debugging and analytical skills
  • Strong knowledge of HDLs like Verilog, System Verilog
  • Proficiency in developing SV/UVM based test benches
  • Proficient in debugging RTL/TB issues using Verdi or similar tools
  • Proficient with scripting languages such as Perl and(or) Python
  • Knowledge of UPF, low power architecture (preferred)

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