Memory Sub-System Performance Architect

Qualcomm Technologies, Inc. is seeking a Memory Sub-System Performance Architect to join their infrastructure IP Team. This role is crucial in defining and designing Platform infrastructure HW components including memory controllers, system cache, system MMU, and interconnect implemented across Qualcomm SoCs.

The position involves deep technical work in studying System Performance using cycle-accurate/approximate models and supporting both Infrastructure IP level micro-architecture optimizations and System level application performance verification. The ideal candidate will work at the intersection of hardware architecture and performance optimization, collaborating with cross-functional teams to drive innovation in memory subsystem design.

Key responsibilities include collaborating with domain experts in CPU, GPU, Display, and Camera to understand cache usage requirements, conducting sophisticated modeling and analysis of system cache and replacement algorithms, and developing comprehensive test plans for new architectures. The role requires strong analytical skills to identify memory bottlenecks and propose improvements based on benchmark analysis.

The position offers competitive compensation ranging from $134,500 to $215,000, along with comprehensive benefits including annual bonuses, RSU grants, and extensive healthcare coverage. This is an excellent opportunity for experienced engineers passionate about pushing the boundaries of memory system performance and architecture.

Working at Qualcomm means joining a team of technology innovators who are shaping the future of mobile and computing systems. The company provides a collaborative environment where you'll work alongside industry experts and have access to cutting-edge technology and resources. The role offers significant growth potential and the chance to impact next-generation product development at a global technology leader.