Memory Subsystem Performance Architect

Qualcomm Technologies, Inc. is seeking a Memory Subsystem Performance Architect to join their infrastructure IP Team. This role is integral to the development and optimization of Platform infrastructure hardware components, including memory controllers, system cache, and interconnect systems implemented across Qualcomm SoCs.

The position requires a deep understanding of hardware microarchitecture, particularly in memory systems and interconnect. You'll be responsible for conducting performance analyses using cycle-accurate models, identifying bottlenecks, and implementing optimizations at both the infrastructure IP level and system level. The role involves close collaboration with IP designers, Design Verification teams, and System performance architects.

Key responsibilities include modeling and analyzing system cache and memory controller scheduling algorithms, developing comprehensive test plans, and conducting detailed analysis of CPU and GPU benchmarks to enhance memory performance. You'll also be expected to stay current with industry trends in memory subsystem innovations and mentor junior engineers.

The ideal candidate should possess at least a Bachelor's degree with 2+ years of experience or equivalent advanced degrees. Strong programming skills in C++ and Python are essential, along with expertise in performance analysis and debugging. The position offers competitive compensation ranging from $115,600 to $173,400, plus comprehensive benefits including health coverage, annual bonuses, and RSU grants.

Join Qualcomm's dynamic team where you'll have the opportunity to work on cutting-edge technology while collaborating with industry experts. The company offers excellent career growth opportunities, continuous learning programs, and a supportive work environment focused on innovation and technological advancement.