Multimedia ASIC Design Engineer (Vancouver)
Description For Multimedia ASIC Design Engineer (Vancouver)
Qualcomm Canada ULC is seeking a Multimedia ASIC Design Engineer to join their Multimedia Camera HW team in Vancouver. This role offers an exciting opportunity to be involved in the design of world-class image and video processing blocks. The ideal candidate will have 3+ years of experience in RTL design, verification, and multimedia processing.
The position involves collaborating with hardware/system architects to design and implement sophisticated multimedia and camera image processing solutions. You'll be responsible for core IP delivery, RTL design, synthesis optimization, and various technical checks including design rules, low power, and cross-clock-domain verification.
This role requires strong technical expertise in ASIC design, particularly with Verilog or VHDL RTL design, along with experience in bus protocols and image/video processing. The fast-paced environment demands excellent communication skills and the ability to work cross-functionally.
Qualcomm offers comprehensive benefits including world-class health coverage, financial planning support, and wellbeing programs. The company fosters a culture of innovation and continuous learning, providing opportunities for professional growth through mentorship and tuition reimbursement.
Join Qualcomm to work alongside leading engineering experts, contribute to breakthrough technologies, and be part of a team that's shaping the future of wireless technology and multimedia processing. The position offers the chance to work on cutting-edge projects while developing your expertise in ASIC design and multimedia systems.
Responsibilities For Multimedia ASIC Design Engineer (Vancouver)
- Collaborate with hardware/system architects to micro-architect/design HW specific to Multimedia and Camera Image
- Own and deliver core level IP
- RTL design
- Run synthesis and review results to ensure desired QoR is met
- Perform design rule checks, low power checks, cross-clock-domain checks
- Evaluate performance, area, power, and system cost tradeoffs
- Work with design verification engineers to develop test plans
- Implement and debug tests at module and core level
- Create and maintain design documents
Requirements For Multimedia ASIC Design Engineer (Vancouver)
- Bachelor's degree in Science, Engineering, or related field
- 3+ years of industry experience
- Experience with Verilog or VHDL RTL design
- Experience with Design Verification
- Knowledge of Bus protocols like AHB, AXI
- Experience in Image, Video, Graphics, Multimedia Processing, or DSP
- Experience with RTL sanity tools for Design Rule Checking, Clock Domain Crossing checks, Synthesis, Timing analysis, Low power checks
Benefits For Multimedia ASIC Design Engineer (Vancouver)
- World-class health coverage for employees and dependents
- Financial planning and future preparation programs
- Emotional/mental strength and resilience support
- Wellbeing programs
- Continuous learning and development programs
- Tuition reimbursement
- Mentorship opportunities
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