Next-Gen, High-Speed Memory Subsystem ASIC Digital Design Engineer
Description For Next-Gen, High-Speed Memory Subsystem ASIC Digital Design Engineer
Qualcomm Technologies, Inc. is seeking a talented Next-Gen, High-Speed Memory Subsystem ASIC Digital Design Engineer to join our innovative team. This role is crucial in developing next-generation high-speed LPDDR/DDR memory subsystems that interface with critical system components like CPU, GPU, DSP, and Multimedia Processors.
The position offers an exciting opportunity to work at the forefront of semiconductor technology, where you'll be responsible for architecture, design, and deployment of cutting-edge memory subsystems. You'll be working with designs operating at speeds of 1GHz+ and contributing to products that power millions of devices worldwide.
As an ASIC Digital Design Engineer, you'll be involved in the complete design cycle - from architecture definition to RTL implementation, and through to physical design support. Your responsibilities will include developing design specifications, driving micro-architecture decisions, implementing RTL code, and ensuring high-quality deliverables through various stages of verification and validation.
The role requires strong technical expertise in ASIC design and RTL coding, with particular emphasis on high-speed digital design. You'll be working with modern memory technologies, cache controllers, and NoC-based architectures, requiring deep understanding of CPU/bus architectures and memory transaction ordering.
Why join Qualcomm?
- Work with industry-leading experts in semiconductor design
- Contribute to cutting-edge technology that impacts millions of devices
- Comprehensive benefits package including healthcare, 401k, and equity
- Continuous learning opportunities and career growth
- Collaborative and innovative work environment
The ideal candidate will bring 5+ years of ASIC design experience, strong RTL coding skills, and a passion for pushing the boundaries of memory subsystem design. If you're excited about working on next-generation technology and want to be part of a team that's shaping the future of mobile and computing devices, this role offers the perfect opportunity to make your mark.
Join us in creating the foundation for tomorrow's computing systems while growing your career with a global leader in semiconductor technology.
Responsibilities For Next-Gen, High-Speed Memory Subsystem ASIC Digital Design Engineer
- Develop and contribute to design specifications for next-generation memory subsystems
- Implement and deliver RTL code for high-speed memory controllers
- Debug designs and provide support for chip integration
- Work on synthesis, timing closure, and physical design support
- Perform gate level simulations and power analysis
- Drive improvements in design methodology for productivity and quality
Requirements For Next-Gen, High-Speed Memory Subsystem ASIC Digital Design Engineer
- Bachelor's or Master's degree in Science, Engineering, or related field
- 5+ years of ASIC design and RTL coding experience
- Experience with high-speed digital design
- Knowledge of LPDDR memory and cache controller architectures
- Familiarity with x86 or ARM CPU/bus architectures
- Understanding of memory transaction ordering and ISA specifications
Benefits For Next-Gen, High-Speed Memory Subsystem ASIC Digital Design Engineer
- Competitive annual discretionary bonus program
- Annual RSU grants
- Comprehensive healthcare coverage
- 401k program
- Education and tuition reimbursement
- Mentorship opportunities
- Continuous learning and development programs
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