Qualcomm Technologies, Inc. is seeking a Package/System Design Engineer to join their Central Hardware Systems (CHS) Architecture and Design team. This role is integral to Qualcomm's package products across Digital, IOT, RF, Analog, and PMIC sectors. The position combines technical expertise in package design with system-level optimization.
The role involves sophisticated package selection, design, and EE modeling, requiring a deep understanding of system co-design principles across IC-PKG-PCB die. The successful candidate will need to balance multiple constraints including package footprint/height, IC floor-planning, PCB considerations, high-speed signal integrity, power distribution, and thermal management.
Key responsibilities include IC top-level floor-planning, system-level co-design methodology, and concept analysis for new product package selection. The engineer will work on implementing high-speed interface SI constraints and power distribution network requirements for high-speed processor cores, while considering cost optimization at the system level.
The position offers competitive compensation ranging from $108,400 to $162,600, along with comprehensive benefits including annual bonuses, RSU grants, and extensive health coverage. Qualcomm provides a collaborative environment where innovation is encouraged, offering continuous learning opportunities and mentorship programs.
This role represents an excellent opportunity for an experienced engineer to work with cutting-edge technology while contributing to Qualcomm's leadership in wireless telecommunications. The position requires a combination of technical expertise, strategic thinking, and collaborative skills to succeed in a fast-paced technology environment.