PD - Sr Engineer

Backend
Senior Software Engineer
In-Person
3+ years of experience
AI

Description For PD - Sr Engineer

Qualcomm Chennai is looking for a STA and Synthesis Engineer who is passionate about working with cross-functional engineering teams. In this position, the engineer will be involved in all stages of the design and development cycles.

Responsibilities:

  • Synthesis, Static Timing Analysis and LEC of SoC/Cores
  • Full chip and block level timing closure, IO budgeting for blocks
  • Logical equivalence check between RTL to Netlist and Netlist to Netlist
  • Implementation of low-power techniques including clock gating, power gating and MV designs
  • ECO timing flow
  • Scripting using TCL and Perl

Requirements:

  • Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 2+ years of Hardware Engineering or related work experience. OR Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 1+ year of Hardware Engineering or related work experience. OR PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field.
  • 3-6 years of experience
  • Proficiency in scripting languages (TCL and Perl)
  • Knowledge of low-power techniques
  • Experience with Synthesis, Static Timing Analysis, and Logical Equivalence Checking

Qualcomm is an equal opportunity employer and is committed to providing reasonable accommodations to individuals with disabilities during the application and hiring process. The company offers a comprehensive benefits package including health coverage, wealth-building programs, and resources for emotional/mental strength and wellbeing.

Join Qualcomm to work alongside leading engineering and technology experts, contribute to world-changing innovations, and unlock your full potential in a supportive and inclusive culture.

Last updated 3 minutes ago

Responsibilities For PD - Sr Engineer

  • Synthesis, Static Timing Analysis and LEC of SoC/Cores
  • Full chip and block level timing closure, IO budgeting for blocks
  • Logical equivalence check between RTL to Netlist and Netlist to Netlist
  • Implementation of low-power techniques including clock gating, power gating and MV designs
  • ECO timing flow
  • Scripting using TCL and Perl

Requirements For PD - Sr Engineer

  • Bachelor's or Master's degree in Computer Science, Electrical/Electronics Engineering, or related field
  • 2+ years of Hardware Engineering experience for Bachelor's degree holders, 1+ year for Master's degree holders
  • 3-6 years of overall experience
  • Proficiency in scripting languages (TCL and Perl)
  • Knowledge of low-power techniques
  • Experience with Synthesis, Static Timing Analysis, and Logical Equivalence Checking

Benefits For PD - Sr Engineer

Medical Insurance
401k
Mental Health Assistance
  • World-class health coverage
  • Wealth-building programs
  • Emotional/mental strength and resilience resources
  • Wellbeing programs
  • Continuous learning and development programs
  • Tuition reimbursement
  • Mentorships

Interested in this job?

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