CPU Physical Design Staff Engineer

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Description For CPU Physical Design Staff Engineer

Qualcomm is seeking a CPU Physical Design Staff Engineer to join their team in Hyderabad. This role is part of the team responsible for delivering Snapdragon CPU design and flows for high-performance SoCs in sub-10nm process for Mobile, Compute and IOT market space. The position requires extensive experience in ASIC design implementation, with a focus on Place and Route Implementation, Timing Closure, and Power Analysis. The ideal candidate will have 10-15 years of experience in High Performance core Place & Route and ASIC design implementation, with strong expertise in tools like Innovus and Primetime. This is an opportunity to work with cutting-edge technology at a leading semiconductor company, collaborating with cross-functional teams to develop solutions that push the boundaries of what's possible in mobile and computing technology. Qualcomm offers comprehensive benefits, including world-class health coverage, financial planning support, and continuous learning opportunities. The role combines technical leadership with hands-on engineering work, making it ideal for experienced professionals looking to impact next-generation CPU design.

Last updated 3 months ago

Responsibilities For CPU Physical Design Staff Engineer

  • Participate in ASIC development with emphasis in Place and Route Implementation, Timing Closure, Low Power, Power Analysis and Physical Verification
  • Create design experiments and conduct PPA comparison analysis
  • Work with RTL design, Synthesis, low power, Thermal, Power analysis teams
  • Develop Place & Route recipes for optimal PPA
  • Tabulate metrics results for analysis comparison

Requirements For CPU Physical Design Staff Engineer

Python
  • Bachelor's degree in Computer Science, Electrical/Electronics Engineering or related field
  • 10-15 years of High Performance core Place & Route and ASIC design Implementation work experience
  • Extensive experience in Place & Route with FC or Innovus
  • Experience with STA using Primetime and/or Tempus
  • Experience of multiple power domain implementation with complex UPF/CPF definition
  • Perl/Tcl, Python, C++ skills
  • Strong problem solving and ASIC development/debugging skills
  • Experience with CPU micro-architecture and their critical path

Benefits For CPU Physical Design Staff Engineer

Medical Insurance
Dental Insurance
Vision Insurance
Mental Health Assistance
Education Budget
  • World-class health coverage for employees and dependents
  • Financial planning and future security programs
  • Emotional/mental strength and resilience support
  • Wellbeing programs
  • Continuous learning and development programs
  • Tuition reimbursement
  • Mentorship opportunities

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