Qualcomm India Private Limited is seeking a talented Physical Design Engineer to join our team in Chennai. This role offers an exciting opportunity to work with cutting-edge technology in semiconductor design and implementation.
The position involves comprehensive physical implementation activities for sub-systems, including critical tasks such as floor-planning, place and route, clock tree synthesis (CTS), and formal verification. You'll be responsible for physical verification (DRC/LVS), power delivery network (PDN) design, timing closure, and power optimization.
As an ideal candidate, you'll need a Bachelor's degree in Computer Science, Electrical/Electronics Engineering, or a related field, along with 2-4 years of relevant experience. Your expertise should include strong knowledge of timing convergence for high-frequency data-path intensive cores and advanced STA concepts. A solid understanding of clocking architecture is essential, as is proficiency in Tcl/Perl scripting.
At Qualcomm, you'll be part of a collaborative environment, working closely with design, DFT, and PNR teams to resolve various technical challenges. We offer comprehensive benefits including world-class health coverage, financial planning support, wellbeing programs, and continuous learning opportunities through tuition reimbursement and mentorship programs.
Join us to be part of a company that's at the forefront of wireless telecommunications and semiconductor innovation. You'll have the opportunity to work on challenging projects while developing your skills alongside industry experts. Our supportive, inclusive culture encourages creative problem-solving and professional growth, making Qualcomm an ideal place to advance your career in physical design engineering.