CPU Physical Design Staff / Sr Staff Engineer

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Description For CPU Physical Design Staff / Sr Staff Engineer

Qualcomm is seeking an experienced CPU Physical Design Staff / Sr Staff Engineer to join their team in Hyderabad. This role is part of a fast-paced team responsible for delivering Snapdragon CPU design and flows for high-performance SoCs in sub-10nm process for Mobile, Compute and IOT market space.

The ideal candidate will bring 10-15 years of extensive experience in high-performance core Place & Route and ASIC design implementation. You'll be working on cutting-edge technology, participating in ASIC development with a focus on Place and Route Implementation, Timing Closure, Low Power, Power Analysis, and Physical Verification.

Key responsibilities include creating design experiments, conducting PPA comparison analysis, and working closely with RTL design, Synthesis, and Power analysis teams to optimize Performance, Power, and Area (PPA). You'll be developing Place & Route recipes for optimal results and implementing Clock Tree for High Speed Design.

Technical requirements include proficiency in Place & Route with FC or Innovus, experience with STA using Primetime/Tempus, and strong skills in constraint generation and validation. Knowledge of multiple power domain implementation with complex UPF/CPF definition is essential. Programming skills in Perl/Tcl, Python, and C++ are needed, along with strong problem-solving abilities and ASIC development/debugging experience.

Qualcomm offers comprehensive benefits including world-class health coverage, financial planning programs, emotional/mental health support, and extensive professional development opportunities. The company fosters a supportive, inclusive culture where innovative ideas are valued and contribute to world-changing technologies.

Join Qualcomm to work alongside leading engineering experts, participate in continuous learning programs, and contribute to breakthrough technologies that impact lives globally. This role offers the opportunity to work on next-generation CPU designs while growing professionally in a collaborative, cutting-edge environment.

Last updated 2 months ago

Responsibilities For CPU Physical Design Staff / Sr Staff Engineer

  • Participate in ASIC development with emphasis on Place and Route Implementation
  • Create design experiments and conduct PPA comparison analysis
  • Work with RTL design, Synthesis, and Power analysis teams
  • Develop Place & Route recipes for optimal PPA
  • Implement Clock Tree for High Speed Design
  • Perform Timing Closure and Physical Verification
  • Optimize Performance, Power and Area (PPA)

Requirements For CPU Physical Design Staff / Sr Staff Engineer

Python
Linux
  • Bachelor's/Master's in Electrical Engineering or equivalent
  • 10-15 years of High Performance core Place & Route and ASIC design Implementation experience
  • Extensive experience in Place & Route with FC or Innovus
  • Experience with STA using Primetime and/or Tempus
  • Proficient in constraint generation and validation
  • Experience with multiple power domain implementation
  • Formal verification experience
  • Perl/Tcl, Python, C++ skills
  • Strong problem solving and ASIC development/debugging skills
  • Experience with CPU micro-architecture

Benefits For CPU Physical Design Staff / Sr Staff Engineer

Medical Insurance
Dental Insurance
Vision Insurance
Mental Health Assistance
Education Budget
  • World-class health coverage
  • Financial planning programs
  • Emotional/mental health support
  • Wellbeing programs
  • Continuous learning and development programs
  • Tuition reimbursement
  • Mentorship opportunities

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